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TPS63802: Advice on possible causes and countermeasures for TPS63802DLAR corruption

user3958815
Prodigy 30 points
Part Number: TPS63802
Other Parts Discussed in Thread: INA180, ,

I created a circuit to light the bulb at a constant current with the output of TPS63802DLAR.
TPS63802DLAR will be damaged. I would like advice on the cause of the damage and what to do about it.

Please refer to the circuit diagram in the attached file. Power supply 5V is supplied from CN2.
The output of TPS63802DLAR is connected to connector CN1 via R3 for current detection,
and the other terminal of CN1 is connected to GND.
A light bulb is connected to CN1. The rating of the bulb is 5V, 1A. The voltage across R3
for current detection is input to INA180A1IDBVR of the current sense amplifier U2.
The output of U2 is divided by R1, R4 and an external variable resistor connected to connector CN3,
the signal from the center terminal of the variable resistor is returned to pin2 of CN3,
and the voltage of pin2 of CN3 is input to the FB terminal of TPS63802DLAR .
By dividing the voltage with a fixed resistor and a variable resistor, we are trying to
realize a constant current by applying 0.5V to the FB terminal when the desired current flows to the bulb.

In the circuit diagram, the EN pin of the TPS63802DLAR is connected to GND, but actually the power
supply voltage of the TPS63802DLAR is reduced to 1/3 by resistor division and supplied to the EN pin,
then TPS63802DLAR will work when the power supply voltage is sufficiently high.

The current flowing through the bulb is about 0.5A to 1A. The power supply is turned on with
the current flowing through the light bulb minimized, the current value is gradually increased
after lighting, and the TPS63802DLAR seems to be damaged when the current reaches about 1A.
At this time, the output voltage of TPS63802DLAR is about 5V.
Since the output voltage is close to the input voltage, I imagine that it is in Buck-Boost
Operation mode. Looking at the output voltage waveform, it seems that the noise is increasing.

After damage, it will not recover even if the power is turned on again.
In the circuit diagram, the power of U2 is taken from the output of TPS63802DLAR,
but the symptom does not change even if the power of U2 is taken from the input side of TPS63802DLAR.

The cause of the damage has not been identified so far.
Isn't it good to use the TPS63802DLAR with constant current due to such feedback?
Or is it necessary extra careful when using light bulbs as loads?
Looking at the TPS63802DLAR datasheet, it looks like it has overvoltage, overcurrent and
overheating protections and doesn't seem to break easily.TPECB-2915_RAMP_DRV回路図.pdf

  • 0
    TI__Expert 7925 points

    Hi user3958815,

    Thanks you for reaching out.

    The current control should work. You mentioned that there is a noise in the output voltage, so it might be that the PCB layout is not optimal.

    1. Could you please show us your PCB layout? If this is sensitive information, you can send it to me in a private message. 
    2. Are you able to take some scope plots (on VIN and VOUT pins of the TPS63802, and OUT pin of the INA180) when the noise in the power supply increases.

    Best regards,
    Milos

  • 0 in reply to Milos
    Prodigy 30 points

    Dear Milos.

    Thank you for your response. I send you PCB layout and scope plots when the noise in the power supply increases.

    I tried capacitor C3 connected to VO of TPS63802 to be changed from 22uF to 22uF x2, it seems that
    TPS63802 becames harder to break.

    Regarding noise, I think that the PCB layout may be the cause, but I think there is another
    cause of damage. Does noise cause damage?

    Please give me the recommended protection circuit.

    Best regards,
    user39588156114.scope plots.pdf6082.PCB layout.pdf

  • 0 in reply to user3958815
    TI__Guru 65200 points

    Hello user3958815,

    The layout could be the root cause of the issues you are having with the device. Please checkout the layout given in the TPS63802 datasheet or EVM user's guide. For example you should not cut the GND layer below the IC. Another problem are the thermals you are using. They add a lot parasitics to your design, but they are not needed anymore for the actual soldering processes as the whole board is heated.

    I expect that the parasitics in the layout cause overshoots on the input and/or output of the device above the absolute maximum rating.

  • 0 in reply to Brigitte
    Prodigy 30 points

    Hello Brigitte,

    Thank you for your advice. I will redesign the board.  You told me not to cut the GND layer under the IC. I referred to the TPS63802 data sheet and the TPS63802EVM data sheet. In the TPS63802 data sheet, it is written that AGND and PGND are not directly connected.  In the board layout example, pin 3 AGND and pin 8 PGND are not directly connected with the pattern under the IC. However, in the board layout described in the TPS63802EVM data sheet, pin 3 AGND and pin 8 PGND are directly connected by the pattern under the IC. Which is correct ?  In addition, I obtained the TPS63802EVM board and tested my circuite on the TPS63802EVM board.  I found that the phenomenon of IC damage did not occur.

     

    ear

  • 0 in reply to user3958815
    TI__Expert 7925 points

    Hi user3958815,

    Brigitte suggested not to cut the GND below the device. The datasheet recommends not to just connect AGND directly to GND, and the shown layout shows that. There is a ground star point below the device, and AGND pin, PGND pin and GND ends of the input/output capacitors are all connected to it. In your layout, you don't have a ground star point. Instead you are using a larger part of the GND plane. The resulting circulating currents can create GND lift, causing noise or instability.

    My suggestion is to replicate the recommended PCB layout shown in the datasheet. Move the input/output capacitors as close as possible to the device, and connect GND ends, PGND and AGND to a star point below the device. After that route the feedback network, and then everything else. Here are some general guidelines on how to do a proper layout for switch-mode converters, same is valid for buck-boost converters:
    http://www.ti.com/lit/an/slva773/slva773.pdf 
    http://www.ti.com/lit/an/slyt614/slyt614.pdf

    Also, it seems that you are not not using the PG output. If so, you can remove R2 and leave the PG pin floating, or connect it to GND.

    As for the noise, the oscillations you measure looks more like a probe pick up, since the frequency is way above the converter bandwidth. One reason could be ground noise. Another reason could be using long GND lead which creates large probe loop when doing measurements, please check these reports:
    https://e2e.ti.com/blogs_/b/powerhouse/archive/2016/07/27/how-you-measure-your-ripple-can-make-you-or-break-you
    http://www.ti.com/lit/an/slva494a/slva494a.pdf (Chapter 3)

    Best regards,
    Milos