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LM5155-Q1: about UVLO/SYNC

Part Number: LM5155-Q1
Other Parts Discussed in Thread: LM5155

Hi Team,

I have questions about UVLO/SYNC pin specifications as below.

1. Do we have any spec for current flow at UVLO/SYNC pin? I can only find <1mA recommendation when UVLO/SYNC pin is driven by MCU directly.

2. Is that typo?

D/S p.19

"Also, in this configuration, it is recommended to apply the external clock pulses after the BIAS is supplied.
By limiting the current flowing into the UVLO pin below 1 mA using a current limiting resistor, the external clock pulses can be supplied before the BIAS is supplied."

Regards,

Kotaro Yamashita

  • Yamashita,

    Thanks for reaching out with your question and for considering the LM5155 in your design.

    The absolute maximum voltage rating of the UVLO pin is BIAS+300mV. If the UVLO pin is driven above the BIAS pin voltage the UVLO pin will be clamped causing current to flow from the UVLO pin to the BIAS pin. Adding a resistor between the UVLO pin and the micro-controller output will limit the current pulled in this condition (UVLO>BIAS). The maximum current in this condition should be 1mA. This is shown in figure 31 of the datasheet. This allows for the micro-controller signal to be pulled high before the BIAS pin voltage is applied.

    If you have any other question please contact me directly.

    Thanks,

    Garrett

  • Hi Garrett,

    Thanks. I understood the current flow at UVLO>BIAS condition. How about normal(BIAS<UVLO) condition? We don't need to care about this?

    Regards,

    Kotaro Yamashita

  • Yamashita,

    The only time the current needs to be limited is when the UVLO > BIAS. If BIAS > UVLO the only current sourced for the UVLO pin is the 6uA used of rhystersis when transitioning from stand-by mode to normal operating. 

    Please let me know if you have any questions.

    Thanks,

    Garrett