High Side Switch with Ultra Low Power

Thanks Priya,

Sorry about the delayed reply. I had some time off work.

I don’t think I’m reading the TPS1HB08-Q1 datasheet correctly. Why is the output leakage in standby (0.5µA @ 25°C) greater than the total output current in standby (0.1µA @ 25°C) ? I took the total output current in standby to mean leakage also because there shouldn't be any output in standby mode.

Peak would be around 50A, and the normal would be < 32A. We’re still working on the first prototype so it would be better to overestimate.

The purpose of this FET is to disable most of the board to allow the product to hibernate

We are looking for a solution with an external FET. We are open to integrated FETs but didn’t think this would be viable.

We already include STL180N6F7 in our BOM so we would prefer to use that in order to reduce the number of unique components.

On Iq,

We would like shutdown mode to be in the nanoamps to extend battery life. The lower the better. The shutdown current of LM74700-Q1 (0.9-1.5µA) is better than most but we would still like something lower.

The operating quiescent is less important but we would prefer something less than a few µA. The operating quiescent current of TPS1HB08-Q1 (6mA) may be too high.

Kind regards,

Dan,

The LM74700-Q1 will likely be your best bet here as an ideal diode controller. It will be limited on the sort of diodnostics it can provide, however will offer the least quiescent current. I will loop in someone from the team who will be able to provide more intimate technical details about the part. 

Hi Dan,

If you are looking for low Iq Ideal diode controller, then LM74700-Q1 is the best fit.

But however you are looking for high-side switch which you would like to turn on the loads when disabled.

LM74700-Q1 can not be used in these applications, because even if it turned off body diode of external MOSFET is going to conduct.

LM5060-Q1 is another device which controls the MOSFET in a high-side switch type of functionality.

This is more suitable than LM74700-Q1.

Regards,

Kari.

Thanks Timothy and Kari,

We are looking for a high side switch.

I suspect that what I'm looking for may not exist. We have relaxed the spec but we still need to preserve battery life while the FET is disabled. This product will sleep for months between short bursts of high power consumption.

Unfortunately, LM5060 still doesn't meet our requirements because of it's 15µA max shutdown current.

Do you have anything that matches the following relaxed requirements? Total shutdown current is by far the most important parameter.

Total ISHUTDOWN

• • Prefer ≤ 1µA
  • Accept ≤ 10µA (only if we really have no choice)

Total IOPERATING

• • Prefer ≤ 1mA (the lower the better)
  • Accept ≤ 10mA (only if we really have no choice)

VLOGIC

• • Must be compatible with 3.3V micro

VSUPPLY

• • Must run on 9-14V supply
  • The unlikely exception is if it can run on a 3.3V supply and drive an N channel FET from 9-14V without compromising shutdown current by adding the additional supply.

FET configuration

• • Must be high side
  • Prefer external but will accept internal FET of ≥ 80A.
  • Prefer N channel. P channel alternatives would need to beat the N channel drivers by enough to justify the additional reel.

Kind regards,

Hi

Iq reduction is possible with LM5060 by adding a MOSFET between IC GND and external GND.

This GND side MOSFET can be disabled during shutdown mode.

Rakesh will share more in this solution.

Regards,

Kari.

Hi Dan,

A signal FET between device ground and the system ground like below can help to meet the target shutdown current spec. Let me know if you have any followup questions. 

Best Regards, Rakesh

Thanks Rakesh and Kari,

Using that solution, how low will the shutdown current be? Will it just be the sum of the IDS leakage from the low side small signal FET and high side power FET?

Can the overcurrent detection be disabled so that we can use it at 80A through the power FET? We already have overcurrent protection closer to the supply anyway.

Kind regards,

Hi Dan,

We have not characterized the leakage current but it should just be the leakage through the external FET (Drain-to-Source leakage). As you see, the ground disconnect FET leaves all the external biasing components around LM5060-Q1 OPEN and hence no shunt leakage at the input.

The overcurrent function can be disabled by connecting the TIMER pin directly to the device GND.

Best Regards, Rakesh

Thanks Rakesh,

I am very excited about this solution.
When I took it to the rest of the team for review, a few questions came back.

When LM5060 is disabled through the enable pin, and through the shutdown pin, what is to stop the enable pin from floating higher than 3.3V and frying the microcontroller on the other side?
From the block diagram in the datasheet, it looks like the enable pin may actually end up being pulled to the now floating GND which could potentially be at the same level as the 9V-14V input.

Is there anything else on the PG pin that we would need to worry about in the same way as the enable pin? It looks like it would be safe, assuming that the block diagram is complete.

The signal FET that I intend to use for disconnecting the device ground has a VDS leakage of 100nA. It could be replaced with something that has better leakage, but what will this leakage do to the LM5060? e.g. if GND floats around 5V or 16V when the supply is 9V-14V, will it cause the LM5060 to do unpredictable things with the power FET?

Kind regards,

Hi Dan,

I would recommend to use optocoupler for isolation while interfacing the EN, nPGD signals with the microcontroller. On my EVM validation, I have not observed any issues with the leakage of the signal FET on the LM5060 operation. As it is not so commonly used configuration, I request you to fully validate it on your system.

Best Regards, Rakesh