Other Parts Discussed in Thread: TPS92518,
Hi all,
I have a system with the ICs mentioned in the title and I would like to clarify some points:
1) "It is recommended to operate at a switching frequency between 250 times the PWM frequency and 2000 times the PWM frequency." Failing to satisfy this requirement creates non-linearities that I can clearly observe while chnaging the PWM setpoint.
In the TPS92662 I notice two main clocks: the first one being the clock of the IC, whose divider is set through the PWMTICK register (let's call it's frequency Fclk).
And the second one being the actual PWM dimming signal, which lasts 1024*Tclk (let's call it's frequency Fdim).
Now, which of the next 2 should be true: Fdim <1/250 Fbuck or Fclk < 1/250 Fbuck?
2) I have used an oscillator crystal of 8 MHz with a PWMTICK divider = 2. This means that the overall Fdim is 3.9kHz. The Vled (12 leds) builds up a 34V and the voltage source is 48V.
I optimized Toff LEDc_TOFF_DAC on TPS92518 to work at the fastest available frequency (in order to minimize the non-linearities described in the point above). So a load of 34V, 0.7A is switched.
At Fdim = 3.9 kHz this results in an extremely high noise generated from the inductor (4KHz is also unfortunately the peak of human hearing bandwidth). This is very annoying! Can you suggest some tips to reduce the noise from the inductor? I'll substitute the crystal with a 16MHz one, so I'll have Fdim = 7.8kHz: this will be better, but we are still quite distant from 16 kHz, which is the frequency at which most adults do not hear anything. Also, I made some experiments with phase shifting of LEDs. But this introduces another problem, which I describe in the point below.
3) In order to reduce the noise from point 2) I tried to heavenly distribute my 6 LEDs couples. In my setup I use the TPS92662-Q1 IC to control 2 independent sets of 12 LEDs couples, 2 LEDs for each shunting FET (24 overall, but 2 sets of 12 totally independent one from each other, each set controlled by 6 FETs). Each set has its own buck channel, each LED has 2.8V of forward voltage drop. This phase shift imposes a real burden to my design. If I don't use phase shift, then the number of LEDs couples working in parallel is 6 and Fdim=3.9kHz. If I shift each LED couple by 1024/6 Tclk, Fdim moves to 23.4 KHz. And this fixes the noise problem since the inductor oscillates at a frequency > maximum hearing frequency for humans. The problem is that when WIDTH of LEDs raises above 1024/6, phases start to overlap. This means that Vled moves from the range 0-5.6V to 5.6-11.2V. Since Toff is optimized to work with Vled = 5.6V then when 2 LEDs couple are on (11.2V) the buck maximum frequency is exceeded (Ton or Toff < Tleb). For this reason I have to limit the PWM dimming range from 0-100% to 0-16.7% (100/6). This is a severe burden on my design.
Since I don't really need 1024 setpoints, for me a simple solution would be to reduce the number of ticks from 1024 to something less, let's say 128. If this was possible I could have done the following: 1 phase (all 6 LEDs couples activated and deactivated at the same time), Fdim = 3.9KHz * (1024/128) = 31.2 KHz. In this way I can optimize LED_TOFF_DAC once for 34V and the oscillations would be beyond human hearing bandwidth. Is this possible?
4) Last question is still about phase shifting. Let's say I have the above 6 LEDs couples heavenly shifted in the 1024 tick range (each phase is shifted 171 ticks after the next one). Now, what happens if I set the WIDTh of the most late LED to something larger than the residual time for it (171*5 = 855 -> 1024-855= 169). For example if I set such WIDTH to 200, would the last LED stop conducting at the end of the 1024 period or it will superimpose with the next LED (the one with phase = 0). From the datasheet it should stop but from the scope I see that the last and the first LEDs phases are overlapped. What is the truth?
Thanks in advance
