TPS560430: Lay-out recommendation

Antonio Di Carlo

Part Number: TPS560430

When preparing a lay-out for this part, we were puzzled by an apparent contradictory information provided in the Data sheet:

11.1 Lay-out Guidelines

...

5. Provide adequate device heat-sinking. GND, VIN and SW pins provide the main heat dissipation path, make the GND, VIN and SW plane area as large as possible.

........

11.1.1 Compact Layout for EMI Reduction

.......

The SW pin (track, I guess) connecting to the inductor should be as short as possible, and just wide enough to carry the load current without excessive heating.

Ok, so should we route SW as a large area to contributeto heat dissipation, or as a short and "just wide enough" track ?

over 5 years ago

0 Frank De Stasi over 5 years ago

TI__Guru 72625 points

Hello

This trade off is a very common one for DC/DC converters.

With such a small package we need to use all of the pins

to get the heat out. More copper area will help to reduce the thermal

resistance and allow the device to run cooler. On the other hand

using a large area for the switch pin can cause more radiation

of EMI. So for each particular application, the designer will have to

decide what performance is the most important.

The best guidance I can give would be to follow the layout of

the EVM and the layout in the data sheet.

I have attached the EVM user guide.

Thanks

slvub52.pdf

0 Frank De Stasi over 5 years ago in reply to Frank De Stasi

TI__Guru 72625 points

Hello

I will close this post due to inactivity

Thanks

Power management

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TPS560430: Lay-out recommendation