Dear TI Experts,
In SLUA560B document Coss_QA_SPEC of spp20n60cfd is given as 780pF at 25V.
And Coss_QA_AVG value calculated as 193pF.But in the datasheet of spp20n60cfd in Page number 8, there is a Coss Vs Voltage curve, if you read Coss at 400V
which gives around 70pF which is too far than 190pF calculated.So what is the right value of Coss needs to consider in our design?
Regards
Aneesh
HI Aneesh
The problem is that it is very difficult to predict the effective stray capacitance at the switched node. First of course is the Coss of the MOSFET. The infineon data sheet gives a figure of 780pF at Vds of 25V but you can of course see that this capacitance is very non-linear as the drain / source voltage changes. The data sheet calculation tries to compensate for this by assuming that the capacitance vs voltage curve follows a square law (hence the square root in eq. 56 in the data sheet), but the result is of course an estimate.
Possibly a better estimate would be to use the Co(er) specification in the MOSFET DS (83pF) to calculate the energy needed to achieve ZVS and to use the Co(tr) (160pF) value when calculating the delay times.
Please remember that there will be additional stray capacitances at the switched node due to PCB tracks, MOSFET Tab to heatsink and especially transformer self capacitances. This is the main reason why it is difficult to know in advance what the capacitances will be - and why it is only when you have hardware available that you can fine tune the shim inductor and delay times.
Regards
Colin
HI Aneesh
The problem is that it is very difficult to predict the effective stray capacitance at the switched node. First of course is the Coss of the MOSFET. The infineon data sheet gives a figure of 780pF at Vds of 25V but you can of course see that this capacitance is very non-linear as the drain / source voltage changes. The data sheet calculation tries to compensate for this by assuming that the capacitance vs voltage curve follows a square law (hence the square root in eq. 56 in the data sheet), but the result is of course an estimate.
Possibly a better estimate would be to use the Co(er) specification in the MOSFET DS (83pF) to calculate the energy needed to achieve ZVS and to use the Co(tr) (160pF) value when calculating the delay times.
Please remember that there will be additional stray capacitances at the switched node due to PCB tracks, MOSFET Tab to heatsink and especially transformer self capacitances. This is the main reason why it is difficult to know in advance what the capacitances will be - and why it is only when you have hardware available that you can fine tune the shim inductor and delay times.
Regards
Colin
