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TPS27S100: Can I AND the FLT# with EN

Wayne Eckertson
Prodigy 190 points
Part Number: TPS27S100

I would like to quicken the short circuit response time of my TPS27S100 based circuit and am considering placing an AND gate at the enable pin.  The inputs to the AND gate would be the FLT# and an enable driven by a microprocessor.  I assume this would create some type of oscillation due to the time delays of circuit but I am hopeful it will keep my current spike amplitude lower.  The microprocessor will eventually respond to the FLT# and deassert the enable.  See embedded image below.

Can you see any flaws in my plan or recommend any other way of quickening the short circuit response of the TPS27S100?

I am currently seeing ~170us current pulse when I assert the enable with a short to ground on the output.  The datasheet claims it will shut down in less than 1us but I am not seeing that. 

  • 0
    TI__Mastermind 34985 points

    Hello Wayne,

    The 1uS number is the specification for if the device is already enabled and a short-to-ground condition occurs.  Chances are you would not gain too much time with this logic as there is an inherent latency from when the device turns on to when a fault is reported on the FLT line- which is the 170uS you are seeing on the line. By connecting this to the AND gate you would likely be aggregating the latency on the additional latency required to deassert the pin via the AND gate.