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CCS/UCD3138A: question about DPWM3 Interrupt

liwei qi
Expert 1160 points
Part Number: UCD3138A
Other Parts Discussed in Thread: UCD3138

Tool/software: Code Composer Studio

The DPWM3  initialized code as follow:

// Control-0
 Dpwm3Regs.DPWMCTRL0.bit.PWM_EN     = 1;         // Enable, wait for Global En
 Dpwm3Regs.DPWMCTRL0.bit.CLA_EN     = 0;         // CLA Disabled, using curr limit to chop 
 Dpwm3Regs.DPWMCTRL0.bit.PWM_MODE   = 0;         // Set mode: 0 - Normal
 Dpwm3Regs.DPWMCTRL0.bit.MSYNC_SLAVE_EN   = 1;   // slave
 Dpwm3Regs.DPWMCTRL0.bit.CBC_ADV_CNT_EN   = 0;   // Adv cnt limit enabled
 Dpwm3Regs.DPWMCTRL0.bit.CBC_PWM_AB_EN    = 0;   // Current limit enabled for AB outputs

Dpwm3Regs.DPWMCTRL0.bit.PWM_A_INTRA_MUX  = 0;   
 Dpwm3Regs.DPWMCTRL0.bit.PWM_B_INTRA_MUX  = 0;  
 Dpwm3Regs.DPWMCTRL0.bit.BLANK_A_EN       = 1;   

 // Control-1
 Dpwm3Regs.DPWMCTRL1.bit.HIRES_DIS         = 1;     
 //Dpwm3Regs.DPWMCTRL1.bit.ALL_PHASE_CLK_ENA = 1;     
 Dpwm3Regs.DPWMCTRL1.bit.CHECK_OVERRIDE    = 1;      
 Dpwm3Regs.DPWMCTRL1.bit.EVENT_UP_SEL      = 1;   // UPdate end of period     

 Dpwm3Regs.DPWMEV1.all  = DPWM3_EVT1;      
 Dpwm3Regs.DPWMEV2.all  = DPWM3_EVT2;      
 Dpwm3Regs.DPWMEV3.all  = DPWM3_EVT3;      
 Dpwm3Regs.DPWMEV4.all  = DPWM3_EVT4;      
 Dpwm3Regs.DPWMPRD.all  = (PWM_PERIOD>>1);  
 
 Dpwm3Regs.DPWMINT.bit.PRD_INT_SCALE = 2;   //every 4 cycles primary(PRD_INT_SCALE = 2) 

 Dpwm3Regs.DPWMINT.bit.PRD_INT_EN = 1;

But I find that the dpwm3 interrupt don't happen. I use the PMbus protocol and debug_IO toggle to see it. The fir number is 26 in the fast interrupt. 

It need your help. Thanks!

  • 0
    TI__Mastermind 18370 points

    Hi Liwei,

    In order for interrupt to work you need to enable it in 3 levels.

    1) In the peripheral (DPWM3) level (You are already showing this part being done)

    2) In the CIM level by calling the two functions:

    //Configure IRQ

    write_reqmask(CIMINT_ALL_PWM2_COMP | CIMINT_ALL_DPWM3);

    //Configure FIQ

    write_firqpr(CIMINT_ALL_DPWM3);

    3) And finally at the global (ARM7) level by calling the two functions:

    //Enable interrupts

    enable_fast_interrupt();

    enable_interrupt();

    So please first verify that all 3 steps are complete.

    If all the above does not work, please check fiq number 27 instead of 26.

    Regards,

    Yitzhak

  • 0 in reply to Yitzhak Bolurian
    Expert 1160 points

    Hi, Yitzhak:

          Thank you very much!

          You are right. I forget to set the register of IRQ.

           I change the firmware, but only set the IRQ and not set the FIQ. Then UCD3138 could not program again. I write 0x5a5a with command 0xD8 to it. It return NACK.

           Why? How can I save UCD3138 to program again?

  • 0 in reply to liwei qi
    TI__Mastermind 18370 points

    Hi Liwei,

    Glad it helped.

    If you mean to write into IRQ register, this can only be done in ARM7 privileged mode and not in user mode.

    That is why the "functions" write_firqpr() and write_reqmask() are implemented by software interrupt and not as ordinary functions.

    Just change the parameters in the calls to the above two functions instead.

    Regards,

  • 0 in reply to Yitzhak Bolurian
    Expert 1160 points

    Hi,Yitzhak:

                    Thank you!