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BQ27750: Sense Resistor Polarity and Thermistor-less Gaguging

Part Number: BQ27750

I have two questions related to the following portion of a circuit in development that uses the bq27750. It is used in an embedded application, such as how a smart phone would have a permanent battery, rather than in a cordless drill with interchangeable self-gauging packs.

1) As hooked up, it looks like SRN and SRP are reversed, and SRN should be the more-negative voltage. This was observed in review sessions, but unwinding the "designed to be in a pack" schematic in the datasheet and EVM gives us a shred of doubt that reversing the connections so SRN is more-negative is actually correct. Please help us confirm the correct orientation.

2) Our charger IC has been assigned control and biasing of the thermistor in the pack as it can more directly control battery safety by charging only at appropriate temperatures. That leaves the bq27750 without a pack temperature to use for impedance tracking. Is it possible to use the bq27750's internal temperature sensor as the sole temperature input for IT, trusting that it will be close-enough to pack temperature? Do I just disable TS1 and enable Internal TS in the "Temperature Enable" register and then Impedance Tracking uses the inputs it has available? The other option is to add a board-mounted thermistor just for the bq27750, but we are hoping to avoid that.

Thank you.

  • Hi Michael,

    See my comments below.

    1)  VBAT (Pin 11) should be shorted to VCELL (Pin 12).  They connect to the battery cell directly.  I would suggest you take a look at the EVM schematic.

    2)  SRP should connect to the negative terminal of the battery cell through a 100-ohm resistor. Its connection in the schematic seems okay.

    3) It is possible to use the internal temperature sensor.  You need to set Settings:Temperature Enable[TSInt] to 1 to enable the internal temperature sensor and Settings:Temperature Enable[TS1] to 0 to disable the external temperature sensor. Also, I would suggest you place a 10k resistor on the TS1 pin.

    Andy

  • The VBAT/VCELL thing is actually another one we needed clarified - thanks for spotting that.

    If you're saying that SRP should connect to the negative side of the battery cell, then that means the schematic does have SRN/SRP flipped.

    OK, we will plan to provide at least the 10K termination for TS1.

  • Hi Michael,

    You are right. Sorry, I have been confused by the GND symbol near R58 in your schematic.   I would suggest you name it as "CHGGND".  Also, Pin 3 of JP2 should connect to the GND.

    Andy

  • Remember that this schematic is not inside a pack - it is the whole 'computing system' for our product.

    The "bare" LiIon cell + integrated protection circuit connects to JP2, with Cell Plus on pin 1, thermistor on 2, and Cell Minus on 3.

    Pin 1 of JP2 if fed by the charger in our system or goes out to feed the circuits of the product.

    Our "GND" on the bottom of R58 could be considered the "Pack Minus" as in page 1 of the bq27750 datasheet. That "GND" is the lowest voltage potential in the system.

    I just want to make sure I clarify the topology of this properly so I can get the connections right.

    Thank you!

  • Andy-

    I am still confused by your recommendation to connect Pin 3 of JP2 to GND. Could you take a look at this again?

    Thanks,

    -Michael

  • Hi Michael, 

    I would suggest you take a close look at the EVM schematic and pay attention to the GND symbols. 

    Andy