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TPS1H200A-Q1: current limit

Part Number: TPS1H200A-Q1

Hello,

Do you have any current creep test data for TPS1H200A-Q1? If taking current creep behavior into consideration, it's hard to achieve target current limit accuracy. 

1. To solve the current creep issue, what's the minimum current slew rate?

2. What are the feedback of other customer regarding the current creep behavior?

Thanks

Dongbao

  • Hi Dongbao,

    There isn't a dependancy on current slew rate for the current limit but actually the dran to source voltage. If it doesn't change enough to cause the VDS to be above 2.5V, the current limit would not trip.

    For the TPS1H200A-Q1, it is noted that current creeping has maximum inaccuracies at lower temperature operation and that slow current creeping should be avoided if possible and workign with sensative loads (see http://www.ti.com/lit/slva859) otherwise creating the inaccuracy that you mention. 

  • Hi Anthony,

    The app note you showed didn't explain why slow current increase cause +25% overshoot, and for the VDS>2.5V limitation listed in d.s, how do we evaluate this spec in real design? Usually we only have the output current spec.....

    thanks

    Dongbao

  • Hi Dongbao,

    The app note was to provide ways of decreasing the inaccuracy during overshoots. Normally, the device is used for triggering and protecting from quick changes in impedance, what type of fault are you looking to protect against? 

  • Hi Anthony,

    Please look into the Fig.7 fast rising load current and Fig.8 current creep in the app note, when the load current behaves as slow rising, the upper current will have a overshoot by 25%, that to say the upper current limit turns to Inormal*1.15*1.25, current regulation accuracy turns to +43%.

    I am trying to figure out how to aviod this behavior, currently i don't see any data says how fast of load current needed to maintain the accuracy in +-15%.

    Dongbao

  • Dongbao,

    I think we are looking at this the wrong way. The current limit is primarily used for very quick (almost instaneous) changes in impedance such as short-to-ground and capacitive inrush. The only thing that matters in this case is the voltage from drain-to-source in the power FET inside the TPS1H200.

    The "current creep" behavior that you are talking about where the impedance decreases- but doesn't decrease enough to trip a greater than 2.5V voltage drop over the switch. Do you have a scenario like this in your application and if so could you elaborate?

    Assuming that you do have a "soft short" sort of situation the slew rate is a don't care here. Your current limit could take forever to go up to the 1.25x overload condition number and not actually trip until it goes over the 25%. This is why it's not necessarily the rate of change of the current- but rather the total voltage drop from drain to source.