Other Parts Discussed in Thread: TMS320C6678
Hi TI team:
I'm using TPS51200 to power DDR3 sections for my TI DSP (TMS320C6678) and 4 SDRAMs (from Samsung - K4B2G1646F-BMMA).
(1) As per JEDEC standard for SDRAMs (JESD79-3F), the dc-tolerance limits for VRefCA and VRefDQ, indicated [VRef(DC)max and VRef(DC)min] is given by ±1% VDD (i.e., ± 15mV; VDD = 1.5V). The datasheet of TPS51200 tells that if VREFIN = 0.75V (ideally, with 1% resistor tolerances), then VREFOUTTOL (REFOUT voltage tolerance to VREFIN) = ± 12mV.
If 12mV is the dc-tolerance of REFOUT rail, does that mean that while designing PCB, the worst case IR drop allowed on the board level is only: 15mV – 12mV = 3mV?
(2) As per JEDEC standard for SDRAMs (JESD79-3F), the ac peak noise on VRef may not allow VRef to deviate from VRef(DC) by more than ±1% VDD (for reference: approx. ± 15 mV).
How much of ac noise is introduced by TPS51200 at the REFOUT pin?
Thanks and Regards,
Binayak