Hello,
We are designing a 150V three-phase inverter based on GAN FET and LMG1210. Switching frequency will be 100kHz. Due to space constraints, we cannot place gate driver and GAN FET in the same PCB side.
The current layout proposal places GAN FETs, current sense resistor and decoupling capacitors on the same side, while gate driver and bootstrap diode are on the opposite side. To minimize gate and source inductance, we will use multiple vias in parallel, with a maximum estimated inductance of 0.15 nH per via. See a diagram attached
Do you consider that this layout will cause many problems regarding ringings or oscillations?
Thank you for your help!