Hi PMIC team,
My customer is using TPS6590378, PWRDOWN is configured as active High, SWOFF_DLY is set to 0 and they want to trigger a power cycle using Sitara processor. However, they observe that pulling PWRDOWN pin high for 8ms does NOT trigger a power cycle. If they increase the high-time to 16ms, the TPS6590378 initiates a power-down sequence. Following questions arise:
Is there some debounce filter internally for this PWRDOWN input?
What is the minimum pulse time needed for PWRDOWN pin, in order to do a power cycle of PMIC?
How much can this minimum pulse time vary between different devices and in worst case?
Thanks & best regards,
KF