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mistakes in SLVA636 and SLVA633

Hi,

there is a mistake in choosing the pole 0 frequency.

As result, you have a very low crossover frequency.

Pole 0 should not be placed around origin, it defines a mid-band gain, so design procedure should be:

- choose a crossover frequency, find a gain at this frequency

- calculate the pole 0 frequency to get 0 dB at this frequency.

- calculate other components to get pole and zero at specified frequencies,

The same mistake is in SLVA633.

  • Hi Dmil,

    The response from the author is as follows.

    Regarding fp0, the actual calculation for Boost converter is:

     

    fp0 = (fc * Vramp*(1-D)^2)/Vin = 1/(2*π*R1*C1)

     

    This gives us where we should set fp0 for the integrator. Once we decide a target fc (0.6kHz), we can get R1 and C1. Also, based on the guidelines for fz1 and fp1 in the application report (SLVA636), we can get R2 and C3.

     

    Since we have RHPZ at 3.6kHz with the specific design parameters, fc should be less than about one-fifth the RHPZ frequency.

    Regards

    Peter

  • Hi Peter,

    may be you should add this information in the ANs and clarify the pictures, because, for example, in SLVA636 you have fp0 = 1.6 Hz and Figures 8 and 9 show fp0 location close to 0 instead of crossing 0 dB gain line?

    The same in the SLVA633, Figures 8, and fp0 = 10 Hz

  • Hi Dmil,

    Thanks for your feedback we will take this on board and update the apps note during the next review cycle.

    Regards

    Peter