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TPS65217: AM3352 enter DS0,power consumption,TPS65217B is used

user6109596
Intellectual 670 points
Part Number: TPS65217
Other Parts Discussed in Thread: AM3352

Hi!

Now I set AM3352 on my board to enter DS0,and I measure the current value of each power line.TPS65217B is used in my project.I post as follow:

I meaured the current on the line VDD_CORE is 2.1mA,the voltage is 1.1V,

the current on the line VDD_MPU is 0.6mA,and the voltage is 1.1V,

 the current on the line VDDS_DDR is 10mA,and the voltage is 1.8V,

the current on the line V_LDO1_1V8 is 0.3mA,and the voltage is 1.8V,

the current on the line V_LDO2_3V3 is 2.4mA,and the voltage is 3.3V,

the current on the line V_LDO3_3V3 is 10.8mA,and the voltage is 3.3V,

the current on the line V_LDO4_3V3 is 12.9mA,and the voltage is 3.3V.

The input of TPS65217B is 5V,40mA.Battery is not connect.

So there is extra power consumption,I an confused.

Where is the extra power consumption?

I need your help hurry!

pdk_am335x_1_0_14 is used in my project.

Thanks!

  • 0
    TI__Mastermind 30280 points

    In the TPS65217, there is no definition of DS0 power consumption. I am assuming DS0 means Deep Sleep 0.

    In this system state, it is likely that the PMIC will be in the SLEEP state, as shown in Figure 24. Global State Diagram on page 39 of the TPS65217 datasheet.

    To enter the SLEEP state, the OFF bit should be set to 0b before the PWR_EN signal goes low (PMIC_POWER_EN) from the processor. In the sleep state, LDO1 = ON for RTC but all DCDCx rails and LDO2-4 are OFF. 

    This is how you would achieve the ISLEEP spec value of 80uA typical on page 8 of the TPS65217 datasheet.

    Also, keep in mind that if there is no battery connected to the BAT pin, it does not make sense to have multiple capacitors connected to the BAT pins (4,5), but in your schematic I see C514, C515, and C516 are connected to BAT. If you are having difficulty entering the SLEEP state of the PMIC, you might consider removing C514 and C616 while replacing C515 with a 10k resistor to GND. You would also want to remove R527 (listed as DNP) and R528 to leave TS pin floating. In this case, the PMIC will not think there is a charged battery at these pins and potentially try to use battery power as a supply.

  • 0 in reply to Brian Berner
    Intellectual 670 points

    Hi!

     I mean DS0 is deep sleep 0.

    I just to make AM3352 enter deep sleep 0,I don't need tps65217b go into SLEEP status.I don't need any DCDCx rails and LDO2-4 OFF,all of the rails should keep on during AM3352 enter deep sleep 0. 

    My question is:when AM3352 enter deep sleep 0, all of the power consumption of my board I have measured,and the total power consumption of my board is not equal to the external power supply to tps65217b.The board power consumption is low when AM3352 enter deep sleep 0.I want to know,when AM3352 enter deep sleep 0,if there is extra power consumption on tsp65217b or not? I can't find the reason to cause extra power consumption when AM3352 enter deep sleep 0 state.

    Thanks! 

  • 0 in reply to Brian Berner
    Intellectual 670 points

    Hi,

       I explain my problem further.

       According to the datasheet of tps65217b,I post the tps65217b DC/DC efficiency figure as follow.

     

      I calculate the power consumption of each trail as follows.

      According to the efficiency figure,when AM3352 enter deep sleep 0,the load current of each trail close to 0.

    1.When AM3352 enter deep sleep 0,I measured trail VDD_CORE's curent is 2.1mA,the voltage is 1.1V,according to the efficiency figure,I chose the efficiency is 78%,and the power consumption of the trail VDD_CORE is 2.96mW.(2.1*1.1/0.78)

    2.When AM3352 enter deep sleep 0,I measured trail VDD_MPU's curent is 0.6mA,the voltage is 1.1V,according to the efficiency figure,I chose the efficiency is 78%,and the power consumption of the trail VDD_MPU is 0.85mW.(1.1*0.6/0.78)

    3.When AM3352 enter deep sleep 0,I measured trail VDDS_DDR's curent is 10mA,the voltage is 1.8V,according to the efficiency figure,I chose the efficiency is 84%,and the power consumption of the trail VDDS_DDR is 21.43mW.(10*1.8/0.84)

    4.When AM3352 enter deep sleep 0,I measured trail V_LDO1_1V8's curent is 0.3mA,the voltage is 1.8V,according to the efficiency figure,I chose the efficiency is 84%,and the power consumption of the trail V_LDO1_1V8 is 0.64mW.(0.3*1.8/0.84)

    5.When AM3352 enter deep sleep 0,I measured trail V_LDO2_3V3 's curent is 2.4mA,the voltage is 3.3V,according to the efficiency figure,I chose the efficiency is 91%,and the power consumption of the trail V_LDO2_3V3 is 8.70mW.(2.4*3.3/0.91)

    6.When AM3352 enter deep sleep 0,I measured trail V_LDO3_3V3 's curent is 10.8mA,the voltage is 3.3V,and I changed the V_LDO3_3V3 to load switch mode.So the to efficiency is 100%,and the power consumption of the trail V_LDO3_3V3 is 8.70mW.(10.8*3.3)

    7.When AM3352 enter deep sleep 0,I measured trail V_LDO4_3V3's curent is 12.9mA,the voltage is 3.3V,according to the efficiency figure,I chose the efficiency is 91%,and the power consumption of the trail V_LDO4_3V3 is 46.78mW.(12.9*3.3/0.91)

    Add the power consumption on all trails to get the total power consumption is:117mW(2.96+0.85+21.43+0.64+8.70+35.64+46.78).

    The tps65217b powers all devices on my board,when AM3352 enter deep sleep 0,supply voltage of tps65217b is 5V, supply current of tps65217b is 40mA,so the the power provided to the tps65217b is 200mW,but the actual total power consumed  is 117mW,there is a difference of 83mW.

    Is this 83mW power consumed on the chip tps65217b？

    To add，I don't need to set tps65217b to SLEEP state,when AM3352 enter deep sleep 0,all power supply trails of tps65217b need to be kept ON.The SLEEP state of tps65217b corresponds to the AM3352 RTC state,but AM3352 RTC mode is not used in my project.

  • 0 in reply to user6109596
    TI__Mastermind 30280 points

    Your equations are correct for a DC-DC regulator:

    • Pin = Pout/η
      • Pin = Vin * Iin
      • Pout = Vout * Iout
      • η is efficiency

    But your equation for LDO efficiency is wrong:

    • LDO efficiency = Vout/Vin
      • Iout = Iin
      • Pin = Pout/η = Vout*Iout/(Vout/Vin) = Vout*Iin/(Vout/Vin) = Vin * Iin (which we already knew) 

    user6109596 said:
    4.When AM3352 enter deep sleep 0,I measured trail V_LDO1_1V8's curent is 0.3mA,the voltage is 1.8V,according to the efficiency figure,I chose the efficiency is 84%,and the power consumption of the trail V_LDO1_1V8 is 0.64mW.(0.3*1.8/0.84)

    You cannot use this figure to determine LDO efficiency. That's not how LDOs work. LDOs deliberately increase resistance to generate the correct output voltage.

    Pin,LDO1 = Vin * Iin = 5.0V * 0.3mA = 1.5mW

    Pin,LDO2 = Vin * Iin = 5.0V * 2.4mA = 12mW

    Pin,LDO3 = Vin * Iin = 5.0V * 10.8mA = 54mW

    Pin,LDO4 = Vin * Iin = 5.0V * 12.9mA = 64.5mW

    So the estimated input power:

    Pin,est = 2.96 + 0.85 + 21.43 + 1.5 + 12 + 54 + 64.5 = 157.24mW

    Still, there is a slight difference between Pin,est = 157mW and Pin = 200mW.

    Have you considered that Vin = 5.0V is an ideal input voltage and that the actual input voltage may be higher or lower than this expected value?

    Have you considered that the efficiency graphs were taken using a few units at room temp (25C) with a specific inductor (Part # LQM2HPN2R2MG0L)? .

    Any change to a single variable in these equations will result in dramatically different calculations. A different inductor may have higher series resistance and the overall efficiency would suffer. An increase in temperature could cause higher resistance inside the IC and higher PCB trace resistance. 

    Overall, I think the estimate is relatively close to the actual input power. 157mW vs. 200mW is not a big difference, and the additional 43mW can be understood as a combination of resistive losses due to external factors and Quiescent power consumption.

    The total power consumed by the PMIC is probably around 1mW and no more than 10mW. Every other IC that is powered by the PMIC also has an IQ spec. Since the DC-DCs and LDOs are enabled, you also need to account for the Quiescent current of every other IC on the board that is receiving power. It is not a simple calculation. I would be satisfied if I calculated 157mW as the estimated input power and measured 200mW as the actual input power.

  • 0 in reply to Brian Berner
    Intellectual 670 points

    Hi!

    Thank you very much for your answers!

    My calculation of LDO consumption is wrong,thank you for your correction!

    1."Have you considered that Vin = 5.0V is an ideal input voltage and that the actual input voltage may be higher or lower than this expected value?"

    A:We use AGILENT 66321B(battery simulator) as our power supply. It should be accurate enough.

    2."Have you considered that the efficiency graphs were taken using a few units at room temp (25C) with a specific inductor (Part#LQM2HPN2R2MG0L)? ."

    A:Yes ,we have used Part # LQM2HPN2R2MG0L on DCDC1,DCDC2,DCDC3 following TPS65217B reference design. We would double check with vendor again.

    3."Overall, I think the estimate is relatively close to the actual input power. 157mW vs. 200mW is not a big difference, and the additional 43mW can be understood as a combination of resistive losses due to external factors and Quiescent power consumption."

    A:Power consumption is sensitive on our design, 43mW difference is still too large for us, we have to figure out the root cause further .

    4."The total power consumed by the PMIC is probably around 1mW and no more than 10mW. Every other IC that is powered by the PMIC also has an IQ spec. Since the DC-DCs and LDOs are enabled, you also need to account for the Quiescent current of every other IC on the board that is receiving power. It is not a simple calculation. I would be satisfied if I calculated 157mW as the estimated input power and measured 200mW as the actual input power."

    A: We measured TPS65217B outputs of power rails directly, tested results of each loads reasonable (for example, DCDC3 as mpu_core power of AM3352 is about 0.6mA(1.1V) under DS0,etc),as I mentioned above,we doudt that there is more than 30mW extra power consumption aroud TPS65217B.When we measured,PWR_EN pin of TPS65217B was pulled up with 100k resister to LDO1(1.8V),and breaked all digital IO with other circuits (like I2C0 of AM335x) ,
    TPS65217B worked as stand alone mode just like TPS65217 EVM. 5V on PIN AC of TPS65217B,no other loads except TPS65217B itself.

    Is there any other suggestion for this?
    Are there any factors that we have not considered that affect the power consumption of our board?
    We are very appreciate for your helps and your suggestions.I am really embarrassed to disturb you for so long,looking forward to your further answers.
    Than you very much!

    Thanks & Best Regards

  • 0 in reply to Brian Berner
    Intellectual 670 points

    Hi!

    We further examined the circuit, and we found that when we set the TS pin of TPS65217B as floating state,we found that the power supply current dropped to 25mA, and the power consumption of the system reached our design requirements.

    We want to know the cause of this confusing phenomenon. How does the state of TS pin affect chip power consumption?

    Really embarrassed to disturb you again!

    Looking forward to your further answer.

    Thank you very much!

  • 0 in reply to user6109596
    TI__Mastermind 30280 points

    Yes, I was about to say that you should try to test system with Battery circuit wired differently:

    • BAT1, BAT2, and BAT_SENSE = all shorted together, but connected to GND with a 10k resistor
    • TS pin floating

    Another option would be to leave BAT_SENSE floating, disconnected from BAT1/BAT2 pins.

    The TS pin is normally connected to an NTC resistor. Because the resistance of the NTC changes with temperature, the PMIC needs to constantly source a known current value into the resistor and measure the voltage to determine the "battery" temperature. Since your application does not have a battery, leaving the TS pin floating means the current does not flow out of this pin to GND. This is one way to save a little power.

    The other option is to remove the capacitors at BAT & BAT_SENSE pins and replace with 10k pull-down resistor to GND. This creates a more stable application, but it also might save some power because the BAT_SENSE pin applies test current to BAT pins to measure the battery voltage, constantly sourcing and sinking small amounts of current when there is a battery in the system. Capacitors behave like small batteries (storing charge). Instead of using the capacitors, a pull-down resistor will not hold any charge and might save some additional power. However, I do not recommend leaving the BAT & BAT_SENSE pins floating together.

    BAT_SENSE floating by itself might also resolve the problem you are facing, but it could confuse the PMIC because it is not detecting the BAT pins correctly.

    I do not see any other obvious indications of high leakage current in your design. The MUX_IN input has 110k from 3.3V to GND = 30uA --> 100uW, and there are no other dividers that I can find, but I do not have whole schematic.

  • 0 in reply to Brian Berner
    Intellectual 670 points

    Thank you very much!

    That's solve my question.