BQ28Z610-R1: I2C clock rise/fall time

Jack Shen2

Part Number: BQ28Z610-R1
Other Parts Discussed in Thread: BQ28Z610

I would like to check the I2C clock rise/fall time spec. for bq28z610. I have two questions.

1. the max time (300ns) for clock rise/fall time is for fast-mode (400 Khz). Am I correct?

2. What is the test condition for clock rise/fall time in the datasheet? 3.3V? 5V? In bq30z554 R1 datasheet, it specify the test condition "Rise time tR = VILMAX – 0.15) to (VIHMIN + 0.15) , Fall time tF = 0.9 VDD to (VILMAX – 0.15)" for SMBus. Is the test condition the same for bq28z610? Thanks.

over 5 years ago

0 Wyatt Keller over 5 years ago

TI__Guru** 105590 points

Hello Jack,

Let me check with the team that wrote the datasheet and get back to you.

Sincerely,

Wyatt Keller

0 Andy Liu (BMS) over 5 years ago in reply to Wyatt Keller

TI__Guru 52115 points

Hi Jack,

See my comments below.

1. the max time (300ns) for clock rise/fall time is for fast-mode (400 Khz). Am I correct?

[Andy] Yes.

[Andy] The nominal timing value is from 1.8V x 10% to 1.8V x 90%.

Andy

0 Andy Liu (BMS) over 5 years ago in reply to Wyatt Keller

TI__Guru 52115 points

Hi Wyatt,

Correct me if you get different answers from our system team.

Andy

0 Jack Shen2 over 5 years ago in reply to Andy Liu (BMS)

TI__Expert 4445 points

Hi Andy,

Thanks for the reply. I would like to check with you on the test conditions. I checked another datasheet (SCPA054). The max rise and fall times is defined from 30% to 70% of VCC for the I2C interface, but for bq28z610, it defines 10% to 90% of VCC instead. May I know the reason why bq28z610 define 10% to 90% of VCC? Thanks.

0 Andy Liu (BMS) over 5 years ago in reply to Jack Shen2

TI__Guru 52115 points

With the specs at these higher levels, the major purpose is to meet I2C specs with some margin.

Andy

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BQ28Z610-R1: I2C clock rise/fall time