This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

UCC28951: some questions about adjusting lagging legs deadtime

Part Number: UCC28951

HI texas supporter:

 I have a  questions about adjusting lagging legs deadtime。

   Here is waveform when the load is 20A.

    the Vds has a bounce and a drop when mos is on and off.it  looks like that the deadtime of lagging leg  is too long.howeve,if i reduce the deadtime ,it will not be ZVS at 10A or ligther load.

    i tried to change KA to 1.it is also unsed ,because the volatge of CS at light load is  too low .  

Do you have some advices?

Looking forward to your reply,

hao

CH1:lagging leg Q4Vds     CH2: current of main transformer    CH3:lagging leg Q4Vgs

 

  • Hi

    I have asked one of our applications engineers to respond to your post.

    Regards

    Peter

  • Hello Hao

    Unfortunately the images did not come through - if you cut and past them into the window then they appear to you but when you press the 'Reply' button they don't actually get transmitted. You need to insert them using the 'paperclip' ison to 'Insert File'.

    Anyhow:  The dead time needed to achieve ZVS on the transformer primary decreases as the primary current increases. The adaptive delays feature of the UCC28951 can do this.

    The other factor is that - in the PSFB topology - it is normally difficult to achieve ZVS at very light loads. The UCC28951 allows you to set a current at which the SRs are disabled (DCM) and as the current reduces past this level and the output inductor current becomes discontinuous the duty cycle drops. You can then set a TMIN level at which the controller enters burst mode (TMIN pin).

    You can also get very short delays by connecting the ADEL and ADELEF pins to a fixed voltage. Here's a document /cfs-file/__key/communityserver-discussions-components-files/196/3173.Calculating-Adaptive-Delays.pdf  showing how you can do this and here is an explanation of how tocontrol the switching delay times?

    Fixed Delays:

    If you want to set a fixed primary side delay in the range 250ns to 1730ns then a resistor at the DELAB or DELCD pin is used and ADEL is grounded. Fixed SR delays in the range 28ns to 174ns may be programmed by the resistor at the DELEF pin with the ADELEF pin grounded. The delays may be calculated by using equations (3), (4) and (6) in the datasheet. Resistances less than 13kW or greater than 90kW at the DELAB, DELCD and DELEF pins are not recommended but there is a way to achieve shorter primary side delays and longer SR delays by putting a fixed voltage on the ADEL and ADELEF pins. The graphs in Figures 29, 30, 32, 33 show how the baseline delays set by the resistance at the DELAB, DELCD and DELEF pins change as the voltage at the ADEL and ADELEF pins changes.

    Short Fixed Primary Side Delays:

    If you want to set a short fixed primary side delay then the simplest option is to put the DELAB or DELCD resistor to 13kW. This sets a baseline delay of 250ns when the ADEL pin is held at 0V. If the voltage on the ADEL pin is increased then the delay shortens according to the graph in Figure 29 for KA = 1. A potential divider from VREF to ADEL will do this. For example, if I want to set the TABSET delays to 100ns, use 13kW at the DELAB pin and a potential divider from VREF to put 300mV on the ADEL pin.

     

    The approach given in the datasheet uses a more complicated approach. It sets VADEL to either 0.2V or 1.8V depending on the delay needed and then chooses RAB to get the desired delay. This approach will get the same result although with different resistor values but it’s less easy to understand and is not actually any better.

    Long Fixed SR Delays:

    If you want to set a long fixed SR delay then the simplest option is to put the DELEF resistor to 90kW. This sets a baseline delay of 174ns when the ADELEF pin is held at 0V. If the voltage on the ADELEF pin is increased then the delay shortens according to the graph in Figure 33 for KA = 1. A potential divider from VREF to ADEL will do this. For example, if I want to set the TAFSET delays to 800ns, I use 90kW at the DELEF pin and a potential divider from VREF to put 1.6V on the ADELEF pin.

    Adaptive Delays:

    Adaptive delays are set in a similar manner to the fixed delays described above. First use the DELAB, DELCD and DELEF pins to set a baseline delay. A potential divider from the CS pin modifies the delays depending on the voltage at the ADEL and ADELEF pins as shown in Figures 29, 30, 32, 33. The potential divider ratio (KA) determines how strongly the voltage at the CS pin affects the delays.

    Don’t forget that getting the optimum delays whether adaptive or fixed is an iterative process.