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UCC27712-Q1: How does level shift circuit operate?

Yoshiki Ochi
Genius 9435 points
Part Number: UCC27712-Q1

Hi team, 

Could you tell me how level shift circuit operates? Could you modify below list if my understanding is incorrect?

Considering input signal "HI" is 0V~10V and high side output signal "HO" is 200V~210V. (HB input is 210V, HS input signal is 200V)

②: Output signal from deglitch filter is 0V~VDD. This filter eliminate non-desired pulse on input signal.
③: Pulse generator output signal is 0V~VDD. It is switching signal for internal SW, that leads to make input signal of pulse filter. the Input signal of pulse filter is 0V~210V.
④: Pulse filter output signal "R" and "S" is in the voltage range of 0V~210V. On the other hand, RS flip flop supply voltages are 200V and 210V.
⑤: RS flip flop output signal is 200V~210V, which is internal switching signal. RS flip flop input signal is 0V~210V from ③、but it could only detect 200V~210V from ④. Input threshold voltage is between 200V~210V (for example, 205V). 

From upper list, ③~⑤ operates as level shift circuit, is it correct?

Regards,
Ochi

  • 0
    TI__Mastermind 23105 points

    Hello Ochi,

    It looks like your understanding is mostly correct regarding the operation. Most driver IC's have an internal bias for logic which is lower than the VDD voltage, so the internal signals from the deglitch filter and pulse generator are 0 to internal bias (usually 5-6V).

    The control to high side level shift happens at 3 shown with the open drain connection to the pulse filter. There will be internal circuits to protect the pulse filter input to the HS high side ground reference.

    On 4 the R and S inputs will be limited to the HB to HS voltage. And 5 will also be limited to HB to HS voltage range.

    Confirm if this addresses your questions, or you can post additional questions on this thread.

    Regards,