TPS92602-Q1: Output current when parallel channels working

Could you share the EVM setting i will double check it in our LAB.

Qiu-san,

Thank you for your quick response.

The EVM is default setting except for  L_B1 nad L_B2.

 L_B1 nad L_B2 were changed to 22uF.

Please let me know if you have any question.

Best Regards,

Kuramochi

Hi Qiu-san,

How is this situation?

Best Regards,

Kuramochi

Hi Kuramochi

That's a normal phenomenon when you parallel two output together that equal two boost loop connect together, then two loop will conflict so there is a difference between two id. The EVM has optimized it by connect 2 comp pin together, you can verify this point by disconnect comp pin.

i want to know whether this point can satisfy your feature. 

Qiu-san,

Thank you for your support.

>you can verify this point by disconnect comp pin.

Does it mean that difference of each current disappears by disconnect comp pin?

Best Regards,

Kuramochi

That will be more worse. i mean you connect two comp together is an optimization result. 

Thank you for your quick response.

Does it mean parallel topology cannot regulate output current accurately?

Best Regards,

Kuramochi

Hi Qui-san,

I have an additional question.

Is there any way to improve the accuracy of regulation on the parallel topology?

Best Regards,

Kuramochi