CCS/TPS65381-Q1: TPS65381 -watchdog application

void main(void)
{
/* USER CODE BEGIN (3) */
unsigned short OPEN_WINDOW_CONFIG = 40, CLOSE_WINDOW_CONFIG = 15;
volatile int temp;
adcData_t ADC_Group1[3];
_mpuInit_();
asm(" cpsie i");

rtiInit();
spiInit();

/* avoid TPS65381 to transit to ACTIVE operating state */
//Hercules_TPS65381
sciInit();
ecmpInit();
if(ecmpIfGetRegister(ECMP_SAFETY_STATUS5) != 7)
{
//TPS65381 does not stay in diagnostic state.
sciSend(scilinREG, 46, (uint8_t *) "\r\nTPS65381 is NOT in DIAG state, toggle IGN!\r\n");
while(1);
}

ecmpDiagMuxOutputMode(2); //analog output
ecmpDiagMuxSelectSignal(0x80);//select VMON Bandgap
ecmpDiagMuxEnable();
for(temp=0;temp<20000;temp++);//add some delay so that the analog output is stable
adcInit();
adcStartConversion(adcREG1,1);
while(adcIsConversionComplete(adcREG1,1)==0);
adcGetData(adcREG1,1, ADC_Group1);
if((ADC_Group1[0].value < 2731) || (ADC_Group1[0].value > 3475))
{
//VMON_BG is out of [2.2v 2.8v]
sciSend(scilinREG, 28, (uint8_t *) "\r\nVMON_BG is out of range!\r\n");
while(1);
}
else
{
sciSend(scilinREG, 24, (uint8_t *) "\r\nVMON_BG is in range!\r\n");
}

ecmpDiagMuxDisable();

asm (" b #-8");

ecmpWdgWindowConfig(OPEN_WINDOW_CONFIG, CLOSE_WINDOW_CONFIG);
/* GIOB7 output*/
( *( volatile unsigned int * )0xFFF7BC00U ) = 1;
( *( volatile unsigned int * )0xFFF7BC54U ) = 1<<7;

TrgPulseOpen = OPEN_WINDOW_CONFIG*1000/2;
TrgPulseClose = OPEN_WINDOW_CONFIG*1000/2+CLOSE_WINDOW_CONFIG*1000/3;
/* select desired WD mode - time in mu seconds */

rtiEnableNotification (rtiNOTIFICATION_COMPARE2);
WDWindow=ECMP_WINDOW_OPEN;//watchdog window is open.
rtiREG1->CMP[2U].COMPx = TrgPulseOpen;//write to the open window in the middle of Topen
rtiREG1->CMP[2U].UDCPx = TrgPulseClose;////write to the close window at 1/3 of Tclose
rtiStartCounter(rtiCOUNTER_BLOCK1);

while(1);
/* USER CODE END */
}

void ecmpInit(void)
{
while (ecmpIfGetRegister(ECMP_SAFETY_STATUS5) != 7);

/* Stay in Diagnostic State and configure SAFETY_CHECK_CONTROL register */
ecmpIfSetRegister(ECMP_SAFETY_CHECK_CONTROL, 0x17);

ecmpIfSetRegister(ECMP_SAFETY_FUNCTION_CONFIG, 0xE4);

/* Clear Status Innformation */
ecmpIfGetRegister(ECMP_VMON_STATUS1);
ecmpIfGetRegister(ECMP_VMON_STATUS2);
ecmpIfGetRegister(ECMP_SAFETY_STATUS1);
ecmpIfGetRegister(ECMP_SAFETY_STATUS2);
ecmpIfGetRegister(ECMP_SAFETY_STATUS3);
ecmpIfGetRegister(ECMP_SAFETY_STATUS4);
ecmpIfSetRegister(ECMP_SAFETY_ERROR_STATUS, 0x00);
}

void rtiNotification(uint32_t notification)
{
/* enter user code between the USER CODE BEGIN and USER CODE END. */
/* USER CODE BEGIN (9) */
short WdgFailCount;
switch(notification)
{
case 4 :
switch (WDWindow)
{
/** send three answers during open window */
case ECMP_WINDOW_OPEN :
WdgFailCount = ecmpGetWdgFailCount();
if(WdgFailCount == 0)
{
switch (Curr_Sta)
{
case 0:
if(ecmpEnableWdg()) Curr_Sta++;
ecmpLockRegisters();
break;
case 1:
if(ecmpLeaveDiagnosticState()) Curr_Sta++;
break;
default:
break;
}
}
ecmpSendWdgAnswer();
ecmpSendWdgAnswer();
ecmpSendWdgAnswer();
/* set next RTI IRQ */
rtiREG1->CMP[2U].UDCPx = TrgPulseOpen;
WDWindow = ECMP_WINDOW_CLOSE;
while((scilinREG->FLR & 0x00000100) ==0);
scilinREG->TD = WdgFailCount+'0';
break;

/** send last answer during close window */
case ECMP_WINDOW_CLOSE :
ecmpSendWdgAnswer();
rtiREG1->CMP[2U].UDCPx = TrgPulseClose;
WDWindow = ECMP_WINDOW_OPEN;
break;
}
if((*(volatile unsigned int *) 0xFFF7BC58) & (1<<7)) ( *(volatile unsigned int *)0xFFF7BC64 ) = 1<<7;
else (*( volatile unsigned int *)0xFFF7BC60 ) = 1<<7;
}
return;
/* USER CODE END */
}

*****************************************************************************************

my question 

I only use NRES as reset for cpu

when  Set  the 65381 in DIAGNOSTIC State, if mcu and tps65381 Questions error.

WdgFailCount = ecmpGetWdgFailCount(); is always No reduction,so (ecmpEnableWdg()) Not executed. That have safe problem.

Hi Whong Zhao,

I have a couple of follow-up questions.

whong zhao said:

1.when  I Set  the 65381 in DIAGNOSTIC State,If the voltage fluctuates, will it automatically reset the cpu.Do I need to make other settings?

When you say "the voltage fluctuates" are you referring to input voltage VBATP or are you referring to a LDO voltage (VDD5, VDD3/5, VDD1). Please refer to Figure 5-16 in the datasheet, for an overview of the event which could trigger a transition to RESET or STANDBY state.

whong zhao said:

2.when  I Set  the 65381 in DIAGNOSTIC State,Is it self-checking? if checking error （LBIST or ABIST）will it automatically reset the cpu.Do I need to make other settings?

The device run ABIST and LBIST automatically every time on a device power-up event or a transition to SAFE state. In SAFE state the device keeps NRES pin high. Therefore the MCU should not be reset due to an BIST failure. For additional information on the ABIST and LBIST please refer to  sections 5.4.6 and 5.4.7 in the datasheet.

whong zhao said:

3.when  I Set  the 65381 in DIAGNOSTIC State,set SAFETY_FUNC_CFG  WD_RST_EN=1,What state is it now？ACTIVE or DIAGNOSTIC

If you set WD_RST_EN = 1 and WD_FAIL_CNT <=7, then the device will remain in DIAGNOSTIC state. If you set WD_RST_EN = 1 and WD_FAIL_CNT = 7+1 the device will transition to RESET.

Regards,
Ivan 

I believer the watchdog fail count is not decreasing due to a watchdog synchronization with the mcu. Could you please review the following post which describes he proper synchronization of the watchdog with the MCU.

https://e2e.ti.com/support/power-management/f/196/t/726147?tisearch=e2e-sitesearch&keymatch=TPS65381A%252525252520watchdog%252525252520synchronization

Thank you

 Because of do sl-4 project. If The TPS65381 have error,the Tps65381 change to safe status？？

but NRES dont put down.the cpu is running as  normal..which have Security risk.

If you want to make sure your system reaches a safe state when the watchdog count is greater than or equal to 5 but not reset the MCU, then you can monitor ENDRV with a pin in the MCU with interrupt capabilities.

If you want to reset the MCU when the watchdog count is (7 +1) you can configure WD_RST_EN=1 and this will cause the MCU to reset. 

Regards,
Ivan

Thank you 

  I mean the tps65381 have error.  it dont performed the action. like it doesn't exist anymore.But  cpu  dont know it isnot running.

 which have Security risk.

Hello Ivan

But I dont link ENDRV IO with CPU,In this case, If the tps65381 has a problem, can I know？

Hello 

 you means I periodically check the pin of ENDRV, if the tps65381 have problem or errors or broken,the pin will pull down.

 in init SAFETY_CHECK_CTRLRegister ENABLE_DRV bit be set  1？