TPS2493: thresholds for MOS activation

Leonardo Di Marsico

Part Number: TPS2493
Other Parts Discussed in Thread: LM5066, CSD19536KTT

Hi,

I would use the TPS2493 to protect a motor with 100A current limitation and nominal voltage of 50V. I set the resistors net to obtain the following values:

UV = 35V (partition on UVEN -pin 1- is 0.7V)

OV= 60V (partition on OV -pin 5- is 0.46V)

VPROG= 0.615V (on pin 3) to limit the power to about 600W

I used two MOS " FDB86363-F085 "

the sensing resistor is 0.5mOhm

All is connected as in reference schematic in datasheet but I get a behaviour I can't understand:

- when i use a Resistive load of 160Ohm all works fine and i find exactly the UV and OV thresholds as expected, so the current flows into the load only with 35<Vcc<60 Volts.

- when i use a Resistive load of 1 Ohm the MOSFET are closed (current flows into the load) even with Vcc=20V. It seems the gate is enabled for some reason that should be inside the TPS2493.

Any support is greatly appreciated.

Thank you very much

Best regards

over 5 years ago

0 Rakesh over 5 years ago

TI__Guru** 105361 points

Hi Leonardo,

Welcome to E2E!

Can you please share schematic and filled up design calculator for review. The design calculator is available under https://www.ti.com/product/TPS2493#design-development##design-tools-simulation

Also share below test waveforms with 1 Ohm resistive load.

UVEN, Vout, GATE, Timer voltage
Vout, GATE, Timer, input current

For this 100A, 50V design LM5066 would be good option as the current limit threshold is just 26mV so power loss in the Rsense will reduce to half and easy to handle on PCB.

Best Regards, Rakesh

0 Rakesh over 5 years ago in reply to Rakesh

TI__Guru** 105361 points

Hi Leonardo,

Can you let us know the application and end product details ?

0 Leonardo Di Marsico over 5 years ago in reply to Rakesh

Prodigy 30 points

Hi Rakesh,

this is the implemented schematic

Please see the attached calculation spreadsheet.

TI-calc.xlsx

I can't find any reason for the activation of GATE with Vbat=20V.

basing on datasheet and resistors net, the gate should be disabled under 35V and this is true with RLoad =165ohm. The circuit does not work as expected with RLoad=1ohm.

about the waveforms I'm afraid the MOS may burn before i can get anything useful.

Thanks for you support.

0 Leonardo Di Marsico over 5 years ago in reply to Leonardo Di Marsico

Prodigy 30 points

sorry,

attached the implemented schematic:

0 Rakesh over 5 years ago in reply to Leonardo Di Marsico

TI__Guru** 105361 points

Hi Leonardo,

Thanks for the details.

The design looks weak with the chosen MOSFET. Please consider strong SOA MOSFET such as PSMN4R8-100BSE or CSD19536KTT. Also, set current limit just above the max load current (use 1mOhm to set 45A min current limit > max load current) so that design margin can be improved. In multiple FET configuration, please add separate GATE resistors for FET as shown in https://www.ti.com/lit/ug/snvu444/snvu444.pdf

To understand misbehavior at 20V, I still need test waveform. Can you provide test waveform in trigger mode with 1 Ohm resistive load. Do you expect any partial FET failure before that test ?

UVEN, Vout, GATE, Timer voltage
Vout, GATE, Timer, input current

Best Regards, Rakesh

Power management

Power management forum

TPS2493: thresholds for MOS activation