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TPS51200-Q1: VTT and VTTREF Tolerance

Matth. B.
Expert 1145 points
Part Number: TPS51200-Q1
Other Parts Discussed in Thread: TPS51200

Hello,

We are using TPS51200 (see my previous post on TI forum) and I have a more general question.

My question is relating to the VTTREF and VTT tolerance on DDR3L and DDR4. I have read article "Powering DDR memory and SSTL logic" written to EE Times in 2011 from Peter Miller.

About VTTREF tolerance, it is clear that we need +/-1% of VDDQ but it not clear how much is needed for VTT tolerance.

We can read in some articles +/-3% of VDDQ between VTTREF and VTT but I'm not sure about this value. It seems that impact on signal integrity could be the same if VTTREF is at +1% than if VTT is at +2%?

If this is the case why VTT could be at +3% for example (corresponding at VTTREF +1.5%)?

Is it possible to have the support of Peter Miller?

Thanks

  • 0
    TI__Mastermind 24075 points

    Hi Matthieu, 

    Sorry, Peter does not support this part any longer. 

    The Vttref tolerance is defined in jedec spec. It is +/-1% of VDDQ. 

    The VTT tolerance is usually defined by DIMM vendor on DIMM datasheet. I would suggest to check DIMM datasheet or consult DIMM vendor for VTT tolerance. 

    Thanks

    Qian