Material No.: tps54260dgq, the defect rate is about 16.7%, and the production is stopped
Bad phenomenon: when the power input is less than 33V, the theoretical output of the chip circuit is 12V with load 1a, which can ensure the output voltage to reach 11V. However, when the input voltage is increased to more than 33V, the output voltage will be lower than 11V, with a large proportion of about 8.5V. Our load is a fixed load, and we observe the change of output voltage, which we think is the chip with No Dynamic load leads to the decrease of output voltage.
This product began to be produced in 2016, and the abnormal loading quality problem was found in the latest batch.
No hardware changes have been made in the last two years.
We found that there is a big difference between the recent chip incoming and the internal chip image of 2018dc material x-ray (under the same X-ray test condition parameters, magnification, etc.):In X-ray, it is found that the two lines in the 9pin pin pin of the current incoming material are obviously different, and the four binding lines of the 9pin pin pin of the historical chip are clear and distinct.Please give priority to confirm why there is such a difference and what is the specific reason?
Customers want to know the following questions:
1. Confirm the reason for the difference of X-ray between two different batches of chips,
2. What is the effect of binding line difference on chip?
