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LMR36520: Lower Cout

Michiaki Tanii
Expert 4610 points
Part Number: LMR36520

Hi team,

 

Could customer place the lower capacitor than the value calculated by equation 6 in the datasheet ?

Customer think it would be OK to match the range of output ripple, but it would affect the phase margin and output voltage stability.

So my answer is no. Is my understanding correct ?

 

And customer would like to simulate adding Cff with the lower Cout alerted “phase margin is too low” in the Webench.

If customer can simulate with lower Cout in any simulation tool, please let me know.

 

Thank you and best regards,

Michiaki

  • 0
    TI__Mastermind 33355 points

    Hi Michiaki

    The converter require minimum output capacitance to limited the loop cross over freq, the Cff is ONLY used for higher Cout condition.

    Customer can try to simulate loop response in Webench by gradually reducing Cout and keep Cff=0pF. 

    B R

    Andy

  • 0 in reply to Andy Chen
    TI__Expert 4610 points
    Hi Andy,
     

    1.      Could you kindly advise why Cff is only used for higher Cout condition ?
    Customer will use output voltage will be typ 14V.

     

    2.      Could you share the equation for calculating phase margin on WEBENCH ?
    Customer would like to evaluate with their any parameters.

     

    3.      I understand if Cout is reduced than min output capacitance, the phase margin will not be enough but customer want to find the way to reduce the Cout.
    If transient response is evaluated enough in their system,  customer can reduce the value of Cout than min Cout ?

     

    4.      Customer would like to evaluate phase margin by themselves by calculation.
    Are there any way to calculate phase margin ?

     

     
    Thank you and best regards,

    Michiaki 
    Hi Andy,
     

    1.      Could you kindly advise why Cff is only used for higher Cout condition ?
    Customer will use output voltage will be typ 14V.

     

    2.      Could you share the equation for calculating phase margin on WEBENCH ?
    Customer would like to evaluate with their any parameters.

     

    3.      I understand if Cout is reduced than min output capacitance, the phase margin will not be enough but customer want to find the way to reduce the Cout.
    If transient response is evaluated enough in their system,  customer can reduce the value of Cout than min Cout ?

     

    4.      Customer would like to evaluate phase margin by themselves by calculation.
    Are there any way to calculate phase margin ?

     

     
    Thank you and best regards,
    Michiaki

  • 0 in reply to Michiaki Tanii
    TI__Mastermind 33355 points

    Hi Michiaki,

    1.      Could you kindly advise why Cff is only used for higher Cout condition ?--------too big Cout will decrease loop cross over freq, Cff can helps to boost cross over freq and improves load transient performance, Cff also recommended if Rfbt is over 100K level. 

    2.      Could you share the equation for calculating phase margin on WEBENCH ?--------Sorry I don't have it. the equation can be estimated by Webench simulation result: F_cross=K/(Vout*Cout)
     

    3.      I understand if Cout is reduced than min output capacitance, the phase margin will not be enough but customer want to find the way to reduce the Cout.
    If transient response is evaluated enough in their system,  customer can reduce the value of Cout than min Cout ?-------Better to measure actual loop response (Bode Plot) on system board to check out minimum Cout value.

     4.      Customer would like to evaluate phase margin by themselves by calculation.----------Please simulate it with Webench or PSPICE model

    B R

    Andy