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TPS65218D0: Minimum time for reset impulse

Part Number: TPS65218D0

Hi!

How long must the reset impulse on PWR_EN at least be, to definitely trigger a reset of  TPS65218D0?

The Deglitch times t_DG in the datasheet are typical values. Is there something like a minimal value?

Thanks a lot!

Marcus

  • Marcus,

    Please refer to the Modes of Operation Diagram in the TPS65218D0 datasheet.

    PWR_EN is not intended to toggle rapidly. If PWR_EN = High, the device will enter the ACTIVE state. If PWR_EN = Low, the device will enter the OFF or SUSPEND state.

    To reset the device, you would need PWR_EN = Low && AC_DET = Low, which will go to the PRE-OFF state and then immediately back to the WAIT_PWR_EN state. This will set the nWAKEUP pin low and tell the processor to return the PWR_EN pin to the High state and the PMIC will transition back to ACTIVE.

    If you want to toggle a pin to Reset the system, I recommend using the PB pin with a push-button and hold the push-button for >8s to reset the system.

  • Hallo Brian,

    As the processor is toggling the reset, and the goal is not something like a factory reset, but just a restart, using the PB pin and holding it for >8s is not an option.

    Using the Modes of Operation Diagram in the datasheet, my goal is to change from ACTIVE via SEQ DOWN to PRE_OFF, then to WAIT_PWR_EN and back to ACTIVE, as you state in your answer, except that you omitted the SEQ DOWN which takes 500ms, which is fine for me.

    I see no reason as to why I should need the AC_DET pin to go to PRE-OFF, as in 5.3.1.1 Power-Up Sequencing, it is stated that: "... the device advances to ACTIVE state, which is functionally equivalent to WAIT_PWR_EN. However, the AC_DET pin is ignored and power-down is controlled by the PWR_EN pin only". Plus, in 5.3.1.16, it is written that "If none of the above behaviors are desired, AC_DET my be tied to system power (IN_BIAS). Power-up is then controlled through the push-button input or PWR_EN input". So, just pulling the PWR_EN input to low to change from ACTIVE to SEQ DOWN should be enough, as I read it.

    Long answer short: I'd like to use the PWR_EN to change from ACTIVE to SEQ DOWN, according to the Modes of Operation, and just have to know how long PWR_EN has to be low to be 100% sure that the SEQ DOWN is started and the PWR_EN low is not deglitched or debounced.

    Thanks & Best Regards,

    Muriel

  • PWR_EN input deglitch time (tDG)

    Rising edge 10 ms typical (deglitch to begin power-up sequence or keep PMIC in Active state)

    Falling edge 100 µs typical (deglitch to begin power-down sequence)

    Keep in mind that if PWR_EN starts low, then you have to set PWR_EN high for at least 10ms before PWR_EN can be set low again.

    ƒOSC 

    Oscillator frequency  = 2400 kHz typical

    Frequency accuracy  +/-12% across temp ranger TJ = –40°C to +105°C

    If you want to have a tight estimate of  PWR_EN input Max. deglitch time (tDG) for Falling edge, then 100 µs * 1.12 = 112 µs because 100 µs is 240 clock cycles (T=0.416667 µs for ƒOSC = 2.4 MHz)

    If you want to have a conservative estimate, then use a factor of 10, PWR_EN input Max. deglitch time (tDG) for Falling edge = 1 ms