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TPS6594-Q1: Sending the Off Request with I2C

Part Number: TPS6594-Q1
Other Parts Discussed in Thread: TDA4VM

Dear TI Team,

I want to send the OFF Request with I2C to the PMIC (From TDA4VM A72 Core) and I found the following infromation in the datasheet:

With this I concluded the i2c command that I Need to send can be the following, Could you please tell me If I am correct here or I need to consider something else?

#Unlock the register
/usr/sbin/i2cset -f -y 2 0x48 0xA1 0x9B
#Send the Off request
/usr/sbin/i2cset -f -y 2 0x48 0x85 0x01

Thanks,

Pouyan

  • Pouyan,

    Hi, you are correct. You just need to write I2C slave address 0x48, register 0x85, data 0x1.

    Why are you writing to register 0xA1? I think this register is read only.

    Also, if you don't have this already, here is a user guide of the TDA4 power solution which may help you in the state machine transitions: http://www.ti.com/lit/pdf/slvubr0

    Thanks,

    Nastasha

  • Hi Nastasha,

    thanks for the clarification. For the 0xA1 in the page 120 it is written that all the registers are default locked and to change them the value 0x9B should be written at the REGISTER_LOCK which is at 0xA1. So thats why I added this. When this is not needed then I wont use it.


    Thanks again,

    Pouyan

  • Hi Nastasha,

    I tried this on the EVM TDA4VM and nothing happend. Do I need to run any other commands before sending the off request?

    Thanks,

    Pouyan

  • Pouyan,

    I confirmed with our design team that the registers are unlocked by default. We will update our documentation to reflect the correct behavior. This means you shouldn't have to write to the REGISTER_LOCK_STATUS.

    For the shutdown, can you make sure all the interrupts are cleared before you write the I2C bit?

    Thanks,

    Nastasha

  • Hi Nastasha,

    thanks for the reply. Could you please tell me which Interrupts should be cleared?

    best regards,

    Pouyan

  • Puoyan,

    I think all interrupts need to be clear before changing states. Can you check if any interrupts are present?

    Thanks,

    Nastasha

  • Hi Nastasha,

    I tried to clear the following Interrupts:

    #Clear the WKUP1 Intterupt
    i2cset -f -y 2 0x48 0x63 0x02
    #Clear the Enable Intterupt
    i2cset -f -y 2 0x48 0x65 0x02

    With that the pmic poweroffs the Safety and Main Domain (I can see the LEDs on the EVM go off and power consumption with that). But I don't know if the state is changed to S2R (Sleep to RAM) or standby. After Clearing the intterupts, I cannot send any more commands (Like Off request command) as my processors are powered-off. So Is this correct or I am missing something here?

    Thanks,

    Pouyan

  • Pouyan,

    Since the processor is not powered, can you check the following:

    1. Measure output voltage of BUCK4 of PMIC A --> If on, you are in S2R state.

    2. Measure LDOVINT of PMICA --> If on, you are in standby state, If off, you are in LP_STANDBY state

    Thanks,

    Nastasha

  • Hi Nastasha,

    Thanks for the hints,

    I messured the TP163 on the EVM which is connected to BUCK4 and DDR, it was 1.14V

    which mean that the memory is still powered and the device goes to S2R, the question now is how can I put the device to Standby mode? Clearing the Interrupts moved the device in S2R.

    Best Regards,

    Pouyan

  • Pouyan,

    I dug into this a little deeper, and I think I might have missed a step in the process. After you clear the interrupts, can you mask the NSLEEP1 and NSLEEP2 bits? I think that since they are unmasked, the device transitions to S2R instead, since they are higher priority triggers. Try masking these, then setting the I2C bit.

    Thanks,

    Nastasha

  • Hi Nastasha,

    Yes this worked perfectly.

    I masked the NSLEEP1/2, then clear the Interrupts and at the end send the off request.

    #Mask the NSLEEP1/NSLEEP2
    i2cset -y 0x48 0x7D 0xC0
    #Clear the WAKUP1 Interrupt
    i2cset -y 0x48 0x63 0x02
    #Clear the ENABLE Interrupt
    i2cset -y 0x48 0x65 0x03
    #Send Off request
    i2cset -y 0x48 0x85 0x01

    Thanks for the help

    Pouyan

  • Pouyan,

    Great! Please feel free to reach out again if you have any other questions.

    Best,

    Nastasha