Good Morning everyone,
as stated in the title, I am trying to lower the output resistance of my negative voltage supply (-5V) source by paralleling two LM2662 devices as described in section 9.2.1.2.1 in the datasheet. The paralleling itself seems to work just fine but as a downside i get a low frequency beat at around 800 Hz which is visible on my signal. In normal operation the second chargepump would not be necessary since the drawn current usually does not exceed 170mA, but for safety reasons i implemented the second chargepump. When measuring the clock frequency of both chargepumps it shows, that the operating frequency is around 87 kHz, which differs a lot from the 150 kHz i was expecting according to the datasheet. And i can also measure the 800Hz difference between the two ~87kHz clocks. I would like to get rid of this low frequency beat.
The wiring of both chargepump is as follows:
- FC: is pulled to V+ (5VDC)
- LV: is floating
- OSC: is floating
- The switching capacitor is a 47uF ceramic cap in 1210 SMD
- On the common ouput i have an Pi-Filter (CLC) with 47uF, 4.7uH and 47uF.
I already have a possible fix, but that would require a change in the layout:
- Add a PI-Filter on each of the chargepumps outputs instead of adding one after the two ouptuts have been connected.
My questions now:
- Is it possible to shift the low frequency beat out of my sinal band (2000 Hz) by adjusting one of the switching caps, or does that affect my performance since both chargepumps operate under different circumstances?
- Why am I measuring a frequency of 87 kHz instead of the 150 kHz?
