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BQ76952: REGIN specification

Simon Jagla
Expert 7745 points
Part Number: BQ76952

Hi Colleagues,

Please check if i got this correctly:

Abs max of REGIN is defined by: 

The Maximum value is: "The minimum of VSS+6 or VBAT+0.3"

Vss+6 is typicall 6V

VBAT is >60V with 16 cells.

That means the absolute maximum of the REGIN pin is 6V in this case. Can you clarify if i read this correctly and there is no voltage > than 6V (from VSS) allowed?

is this guaranteed by the pre-regulator transistor via BREG?

  • 0
    TI__Guru 54715 points

    Hi Simon, 

    The inserted image looks broken but from the question I expect it is the abs max for the REGIN.

    Correct, do not apply more than 6V to the REGIN pin.

    If using the BREG controlled transistor, use the recommended circuit configuration and it will maintain a proper voltage to the REGIN.  Use a capacitor at REGIN, avoid capacitance on BREG, add capacitance at the NPN collector if it couples through the transistor.  Keep traces short and avoid crosstalk.  

    Yes, the external FET must handle the voltage drop from VBAT to REGIN. It is a linear regulator and power dissipation will be high at higher current, that must also be handled by the FET and any dropping resistors in the collector path.

    A switching regulator would be more efficient, its output should stay below the VREGIN_EXT specification, certainly below the 6V abs max.  A 9V or 12V switching regulator is not a suitable input for the REGIN pin, but as an input to the dropping transistor it would help efficiency.  If input directly to the REGIN pin it will have a more limited specification, see the VREGIN_EXT specification and the VREGIN limits in the test conditions for REG1 and REG2 based on the selected voltage.