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TPS22946: Serious problem: Random start failures, no output power.

Part Number: TPS22946

Serious problem here with TPS22946YZPR.

Randomly the chip does not start.

Happens on many device we tested.

There appears to be a relation with the time the input power was off.

We could reproduce this several times with power off between 2.5 and 4.5 seconds.

No permanent damage, the device works again after the event.

Cannot tell (yet) what happens if the ON input is cycled when the situation occurs.

The load is light. 

Disconnecting load does no help

1.2 kOhms from OC to GND does not help.

Traces:

Horizontal: 200 us/div

BLUE: Vin / ON

RED: Vout

YELLOWISH: V_SUP

GREEN: OC

Normal Start

Failed start.

Anyone seen this? found a workaround?

Thanks,

André

  • A variation where the chip changes his mind.

    André

  • Hi Andre,

    It looks to me like the difference between non-turn on event and a turn on event is the rise of the OC signal.

    In your above post, it looks like the switch turns on only after the OC fault is cleared. As such, I think the sequencing of power to the V_SUP rail could be causing this issue.

    On our TPS22946 EVM, we pull the OC pin to the VIN rail with a 10k resistor. Is is possible for you to make a similar change where you pull OC to VIN and not V_SUP and retest this?

  • Hi Shreyas,

    thanks for your answer.

    I believe this change would not help. OC is an open drain output of the chip, it can be left open or pulled up to a voltage compatible with the logic used to read it.

    The output really should have no influence on the internal working of the chip.

    Regards,  André

  • Hi Andre,

    You are correct in your statement that the OC  should not have an effect on the internal working of the chip. But because VSUP rises later, any earlier faults are not correctly noted on the waveform. 

    I believe that you are hitting some sort of fault during turn on (which will be easier noted by the OC pin if it is tied to VIN since VIN goes high early). 

    Could you pull OC to VIN and retest this? Instead of VSUP, is it possible to probe the current going in to the device? 

    I suspect this since you mention that no "damage" occurs and so I think the system is causing the device to unintentionally shutdown to protect itself.

  • I could reproduce the problem on two different  TI TPS22946EVM-499 boards.

    The test set up is as follows:

    The signal generator is used to allow set the power off voltage precisely.

    ON is tied to Vin.

    By changing this voltage in small 1 mV step I was able to find a level where the chip fails to start.

    On EVM 1 is is about 190 mV

    Vin: Blue trace

    Vout: Red trace

    OC: Green trace

    Start retries every 2 seconds, failure to start

    Changing the off input voltage by a few mV allows to start normally.

    ON EVM2, the behavior is a bit different, it retries to start several times until it sopt after about 6 seconds.

    The fail level is about 400 mV, also in a very small voltage rang of about 10 mV.

    GND level is at -2.0 V on these plots

    The fact that there is a very small voltage rang that produces the failure explains its "randomness".

    André

  • Andre,

    Apologies but I'm not sure what the test here is meant to show. The V_il for this device is at max 0.4V which means voltages above 0.4V on the ON pin will not turn off the device. When you say "the fail level" is 0.4V, what do you mean exactly? Are you saying that voltages on the off pin larger than 0.4V will not turn off the device or voltage below 0.4V will not turn off the device?

    From you second picture, the device tries to turn on, looks to be hitting overcurrent and is retrying every 70ms. After 6 seconds, this inrush condition is not resolved which causes the device to shutoff after 6 seconds. This is expected behavior of the device in the case of permanent overcurrent event. Refer to Section 8.3.1.7 in the datasheet for more information. 

    Is it possible to get a detailed look at the turn on phase (like with you initial scope captures in your first post) with current flow through the device being captured?

    Also if you would prefer, please send an email to s-dmello@ti.com to discuss this issue directly.

  • Hello Shreyas,

    I will try to explain the measurements I made in more details so that everybody understands what is observed and how to reproduce it.

    For the test setup, please refer to the schematics I provided earlier.

    To make sure there is not overcurrent at all, I replaced the 100 Ohms load resistor by a 1 kOhms load. At 5 V output, this means a load current of 5 mA.

    You will observe that the output voltage does not rise higher than about 1.4 V when it is shut down. So the current really is about 1.4 mA

    Here a picture of the setup:

    The following plots show the behavior when the voltage at startup is at 190, 200, 210 mV.

    The failure occur ONLY in a narrow range around 200 mV. Outside of this limited range, it start normally.

    A signal generator is used to drive the transistor.

    The input voltage in this example is calculated as follows:

    Voltage on Signal generator is 2 times what is displayed (unterminated 50 Ohms source)

    Base - emitter voltage: about 600 mV

    397mV * 2 - 600 mV = 194 mV

    The period is 1 Hertz, but the behavior is the same with much longer period.

    Plots:

    BLUE: Input and ON signal. 100 mV/div

    RED: Output, 1V/ div (offset -2V)

    Green: OC, 1V/ div (offset -2V)

    190mV starts normally

    200 mV fails to start

    Note that the chip does not go trough any overcurrent sequence as described in the datasheet, it simply goes into overcurrent mode right upon start.

    210 mV start normally

    I hope this answers all questions,

    Best regards, André

  • Further testing shows that when the chip enters this strange state, it cannot be restarted by cycling the ON input.

    The yellow line is the ON signal

    Cycling several time ON while IN is at 5V does not reset the device.

    André

  • Hi Andre,

    I believe that I have been able to recreate this in our lab. I shall share the results over our call tomorrow.

    I was wondering if your use case required the 0.2V to 0.3V offset during the turnoff state? I was able to turn on the device when the offset was lower and higher than this voltage band.

    Thank you for the multiple scope shots. They helped me understand the issue you were seeing.

  • Hi Andre,

    I am closing out this thread as we have moved to direct support over email.

    Thank you for your help in tackling this issue.

  • Hello Shreyas,

    Thanks for confirming the issue.

    Because we do not have enough time to redesign our circuit around another chip, we have decided to add a workaround circuit that clamps Vin to GND for about 0.5 seconds every time Vin drops about 1V. This is necessary because there is a capacitance of about 10 uF on this line that prevents the voltage from dropping in less than 5 seconds below 200 mV when input power is removed

    This allows to maintain Vin below 100 mV immediately after power is removed.

    See circuit below.

    André