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TPS23754: ACF issue

Part Number: TPS23754

Hi Team,

here are a few question to learn from you.

PQ4 ACF_MOS always burns.

There is a capacitor between PQ4 and PQ5, it is V cut, and I think that the output of PQ4 does not affect PQ5.
 1. I don't understand that why have influence for GATE function if PQ4 broken.
    Would you please teach me ?

2. customer analyze report, PQ5 pin5 output on time is very short.
Is this cause of DT ?

3. According to the design guide, if GAT2 is connected to VB, DT can be disabled.
What is the disadvantage of disabling it? Not working ?

attached is schematic,  if have any question or risk,please kindly let us know and learn.

3527.POE.pdf

WAPS-300WDP Failure Analysis Report-20200311.pptx

  • Hello Tommy,

    Active Clamp topologies can see voltage spikes on the P_FET (PQ4 in your design) during shutoff. As the input voltage drops during shutdown, the duty cycle increases to maintain the output. That is why you are seeing short off times for pin 5 PQ5. This in turn creates high voltages on the clamp capacitor PC12, because the primary inductance of the transformer is being reset very quickly (di/dt = V/L). This can cause overvoltage on the P_FET and probably why you are seeing damage. 

    To confirm, capture waveforms of the gates and drains of both FETs during normal operation and shutdown. 

    I would try increasing the capacitance on VC (try 47uF, then 68uF and so on). This will increase the shutdown time, which will allow more energy to get out of the output while the IC is still on.

    DT is the dead time between the two gate drives. This is required for active clamp topologies. The only time you would turn it off is when you are using a single FET topology like a flyback or need the gates to transition at the same time. 

    If this post answers your question, please indicate so by marking this thread as resolved. Thank you.

     

    Regards, 

     

    Michael P.

    Applications Engineer

    Texas Instruments