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LP38512: LP38512 delay

Ian Wang
Mastermind 28035 points
Part Number: LP38512

Hi Sir,

Pls kindly reference as below customer schematic.

O/P will have 6ms delay after EN, what will possible cause it?

Thanks, Ian.

  • 0
    TI__Mastermind 44820 points

    Hi Ian,

    This is likely do to the propagation delay from the EN pin going high to the output rising. 6us is actually much faster than what is shown in the datasheet:

    Does this answer your question?

  • 0 in reply to JCHK
    TI__Mastermind 28035 points

    Hi Guys,

    But customer delay is "6ms", it's really slow than d/s.

    Thanks, Ian.

  • 0 in reply to Ian Wang
    TI__Mastermind 44820 points

    Hi Ian,

    Can they measure the voltage at the Enable Pin, VOUT, and the load current?

    Thanks,

  • 0 in reply to JCHK
    TI__Mastermind 28035 points

    Hi John,

    Yes,  

    Blue channel “En” is Enable Pin.

     Green channel “3.3V_CIS” is VOUT.

    Red channel “Current” is the load current.

    Thanks, Ian.

  • 0 in reply to Ian Wang
    TI__Mastermind 44820 points

    Hi Ian,

    It will have to confirm with design, but it looks like this part has an internal charge pump. If is not shown in the block diagram nor described in the datasheet, but the block diagram shows that the device is using a NMOS as the pass element:

    To support a VDO of <=400mV, there must a charge pump for the internal gate bias supply. It could be that the reason the plot in the PDS showing a faster startup from just the EN pin vs VIN and the EN pin could be that the charge pump needs to startup and raise the internal bias rails to properly modulate the gate of the NMOS.

    Does this help to clarify? Also, it looks like the current limit is being hit during startup. How much capacitance is at COUT?