• State TI Thinks Resolved
  • Locked Locked
  • Replies 5 replies
  • Answers 1 answer
  • Subscribers 63 subscribers
  • Views 361 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS7A4501-SP: Thermal pad connection

WILLIAM CONNOLLY
Prodigy 40 points
Part Number: TPS7A4501-SP

Figure 28 on page 21 of the datasheet indicates that the bottom ground pad should be connected to GND on a plane.

Does this imply that the thermal pad is internally connected to GND or is it floating such that it can be connected to a better thermal plane if one exists.

A specific example would be when the device is used a negative output regulator and the associated ground plane is actually connected to the OUT pins.

  • 0
    TI__Guru 62930 points

    William,

    For the HKU package, the lid and thermal pad are electrically tied together.  They also connect to the die attach area and hence the substrate of the silicon.

    I will confer with design to see if there are issues with not having the substrate tied to ground and get back with you shortly.

    Do you know what potential would be expected on the thermal pad relative to ground on the device?

    Regards,

    Wade

  • 0 in reply to Wade Vonbergen
    Prodigy 40 points

    The proposed connection is to the OUT pins instead of the GND pin so the potential would be the same as the ouput voltage setpoint

  • 0 in reply to WILLIAM CONNOLLY
    TI__Guru 62930 points

    Thanks William.

    I will discuss with one of the designers and get back to you shortly.

    Regards,

    Wade

  • 0 in reply to Wade Vonbergen
    TI__Guru 62930 points

    William,

    We are still looking at this closer.   However, at this time it would be recommended to tie the thermal pad to GND vs another potential.

    Primarily this is due to all of our characterization data (production test, bench characterization, radiation, ...) being performed with the thermal pad (and hence the die substrate) grounded.

    We are looking at the connectivity to the substrate of the silicon, to assess if there may any reliability or performance issues with connecting to a larger potential.  However, without fully re-characterizing the device, this will remain uncertain and the recommendation to tie to GND will remain.

    I have some units getting sent to me to help quantify the substrate to die attach (thermal pad) electrical properties.  This will not be available until mid next week at the earliest.  

    I will update when I have the data.  

    Regards,

    Wade

  • 0 in reply to Wade Vonbergen
    TI__Guru 62930 points

    William,

    I was able to get some additional data that shows some variability in the substrate resistance through the die attach material and potentially the seal ring around the die.

    Based on this, we need to stick with our datasheet recommendation to have the thermal landing connected to ground potential.

    If this answers your question, please click "This Resolved My Issue"
    Regards,
    Wade