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LM3880-Q1: Minimum EN low time before normal power up timing sequence

Part Number: LM3880-Q1

What is the minimum EN low time needed to ensure that the power up sequence is done with the proper timing?  In other words, if I have a 10 ms sequence 1 device (timing designator AA) and EN is low for 30 ms to ensure a normal power down sequence, how long must EN remain low before setting back high to ensure a normal power up sequence?  It seems that if EN is set hi right after Flag3 is low, then there is a long delay (~140 ms) before Flag1 will be set hi, then Flag2 and Flag3 will follow with their specified 10 ms delays.  So after Flag3 is low, how long must I wait before setting EN hi in order to ensure that the Flag1 timing is the correct 10 ms on the power up sequence?

  • Hello

    If you look the figure 14 of the data sheet, it is called incomplete power down sequencer, There is about 120ms before power down and power up sequence.

    so if you have a 10ms device, I would suggest to have the EN low for at least 4x10ms +120ms + 5ms.



  • Yihe,

    What I describe does not match Figure 14 because the EN is held low until after Flag1 goes low.  What I describe matches Figure 2, but Figure 2 does show the time required to wait before EN can be set high again.  If the 120ms is considered part of the normal power down sequence, it should be shown on Figure 2 and specified, or Figure 14 and the description should be clarified to indicate that the same result would be observed if the EN low extended into the 120ms area.

    Can you explain where you get 4x10ms +120ms +5ms?  It takes 3x10ms for Flag3 to go low, then wait 120ms to complete the power down sequence, and maybe 5ms is added for margin because the 120ms is an approximation.  Where do you get the other 10ms?



  • Hello

    Figure 2 is just a demonstrate that how the FLAG output follows the EN which excludes the 120ms delay.

    The another 10ms is the time that FLAG1 goes high again . you are right. this 10ms shall not included.