BQ76952EVM: BQ76952 EVM showing PCHG and PDSG showing 1.7V difference while toggling

Hi Anurag,

PCHG and PDSG are pulled down weakly when "on" and high impedance when "off".  When off it is the RGS installed at the FET which turns off the FET.  Measuring the pin voltage with respect to GND/VSS will pull down the pins showing a value typical of your readings.  A high impedance meter will show slightly better result, measuring from BAT to the pin will give a better indication of performance.

To use pre-charge and pre-discharge for low side connect P-ch signal FETs with the source at the battery voltage.  Rather than switching a power current take the current to a resistor at the low side to control a N-ch FETs for pre-charge and pre-discharge current.  Limit the current in the signal paths as desired, use zeners if needed to protect the gates.

Hi Anurag,

Yes, measure across the G-S resistor.

For the high to low transition, you might do something like this, add diodes to block or limit voltage as needed.

Hi Anurag,

The power FET section seems OK although the charge FETs look reversed and you may want to connect all the drains together so the FETs share current as well as possible.  Also remember that the DDSG and DCHG are 5V max, so select logic level FETs or use a driver with higher voltage supply.  You may want to use Schottky diodes  in the charge gate control if you have the low drive voltage.

In the precharge/discharge circuit the sources of T9 and T10 will need to connect to PACK+ also.  You may want some resistance to the PCHG and PDSG pins to isolate them from any transient through the FETs.  T11 and T12 look reversed (source & drain).  T12 source needs to connect to the sense resistor.  The common connection of R20 and R21 might go to the common drain of the power FETs unless you want to use all the resistors to limit current & spread power.  R18 is undesired as it will bypass the FETs and sense resistor with a resistive path. It is R22 which will develop the gate voltage for T11, consider if you need a zener across it since PACK- has a large voltage range.  Also R24 seems unusual.  Often a resistor or resistor array at R20 provides current limit, but use a circuit which suits your needs.   

Hi Anurag,

RCHG and RDSG will help slow the switching of the FETs to avoid an excessive inductive spikes from the battery or system when DDSG or DCHG switch.  A dedicated FET driver such as UCC27524 is usually very fast.  RDSG for turn off of the discharge FET is usually the main concern since discharge currents may be high, including short circuit.  Turn on is usually less of a concern.  RDSG may need to be tuned for the system to select a value which turns off quickly enough for the FETs used while turning off slow enough to avoid a large inductive spike from the battery.  A value of 1-5 kohm may be an appropriate starting value depending on the FETs used.  The charge path current is often lower current and turn on is again a low concern.  Since the driver can't go above its supply, turn off of the charge FET is accomplished by RDSPD, possibly aided by the PNP and Roff which will provide current gain.  If charge current is low and a modest DC current is acceptable from the driver into RGSPD, a small value for RGSPD may provide an adequate turn off.  For batteries with higher  charging currents the current gain provided by the PNP helping the FETs turn off may be desired.

Hi Anurag,

Simulating with 12V or 0V for the driver output at the DDSG and DCHG nodes on the schematic seems reasonable.  You can simulate a battery with a load resistor to PACK- or charger supply to PACK-, or just put a supply between GND and PACK- and change its polarity.

The simulation tool people should have experts with advice on simulation if you post a question for the simulator (and the question is for the simulator rather than the BMS product).