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UCC27710: Tips to minimize heat

Will Jarrett
Expert 3445 points
Part Number: UCC27710
Other Parts Discussed in Thread: LM5109A

I have a customer using the UCC27710 and they recently spun the board design to more closely match the recommended schematic and layout of the EVM but they are still experiencing fairly significant heating of the IC during normal operation (30-40C temp rise). They are driving a set of AON6512 MOSFETs using either 19V or 15V VCC with a 220nF bootstrap capacitor and 2.2 ohm resistors for VCC and in series with the bootstrap diode. They don't have any gate resistance to keep the FETs operating efficiently, wondering if you can confirm what sort of temp rise they should expect on this part and if you have any tips to minimize the heat rise of the UCC27710.  Thanks so much!

  • 0
    TI__Mastermind 23215 points

    Hello Will,

    Thank you for supporting the UCC27710 gate driver. To determine the gate driver power dissipation, the gate charge, VDD level and switching frequency are needed to calculate the power dissipation. The UCC27710 datasheet section 9.2.2 has guidance in selecting component values and also estimating power dissipation along with how to determine junction temperature in a given application. The datasheet can be found at the link below.

    https://www.ti.com/lit/ds/symlink/ucc27710.pdf?ts=1597936389083&ref_url=https%253A%252F%252Fwww.google.com%252F

    The boot capacitor value of 220nF looks adequate to drive the gate charge of the AON6512 FETs with a Qg of 53nC.

    Regarding improvements to the thermal performance, external gate resistance does serve the purpose of splitting the gate drive power in the external resistor and the driver IC, which will lower the IC power dissipation. Maybe the customer could try relatively low gate resistance to not affect the Vgs rise and fall times very much and still remove some power from the IC.

    From a layout standpoint, most of the power dissipation is in the driver output stage. The thermal path that will benefit the driver the most are the COM pin and VDD pin, and the HS pin and the HB pin for the high side driver. Having larger trace connections, or in the case of COM connection to a small ground plane will reduce the application board thermal to ambient resistance.

    I see that the FET mentioned is rated at 30V, there are 100V rated half bridge drivers which have packages with thermal pads. Can the customer consider a 100V rated half bridge driver? Is there a feature of the UCC27710 that is important to them that may not be offered in other drivers?

    Confirm if this addresses your question, or you can post additional questions on this thread.

    Regards,

  • 0 in reply to Richard Herring
    Prodigy 10 points

    Richard,

    I'm seeing something similar and the only reason we had selected the UCC27710 was because it was footprint compatible with another driver but with significantly lower dead-time. Can you recommend at 100V part as described?

    -Ben

  • 0 in reply to ben moes1
    TI__Mastermind 23215 points

    Hello Ben,

    I understand the pin compatible consideration. One driver to consider that has an SOIC8 pin compatible package and also a SON package with lower thermal resistance is the LM5109A. This part however does not have the interlock and dead time features.

    Is the interlock and dead time required for this application? If dead time is required, then the 100V drivers may not be an option.

    Confirm if this addresses your questions, or you can post additional questions on this thread.

    Regards.