UCC28950: ZVS operation , Miller Clamp

Hello,

There is possible two issues that are not allowing you to ZVS.

1. Your shim inductor (LS) is not enough to provide energy to achieve ZVS.
2. Your turn on delay for A and B and C and D switches are not setup correclty.

The following link will bring you to an application note that describes how to properly size LS and adjust the delay timing to achieve ZVS from 50% to 100 load.  

The following link will also bring you to an excel design tool that can be used to double check your LS and delay timing.  Please note that initial timing is based on theoretical values and the design always needs to be fine tuned. 

file:///C:/Users/a0799388/AppData/Local/Temp/sluc222d.zip

Regards,

Hello,

Please note the CD FETs in a phase shifted full bridge achieve ZVS earlier that AB FETs because they have reflected output current to help transition the switch node.   The following link will be you to 600W reference design.  Figure 10 through 15 show how the switch node behaivor changes with current. 

When designed per the application note that was sent you should have ZVS to at least 50% load on the AB switch node by properly selecting Ls.

I reviewed your waveforms and have the following comments.

3.Q4, 4.Q4, 6.Q2, 7.Q2 and 8.Q3-Q1  look to have ZVS.  Q2 and Q4 are your C and D driven FETs.

Wave forms 9.Q3-Q1 and 10.Q3 Q1 are not ZVS, these are your AB driven FETs.

1. The turn on delay should be set so they valley switch.  It looks like the turn on delay should be 250 ns. 
2. I would try fine tuning the delay to achieve valley switching on these nodes.
3. I would also try increasing the Ls inductor so there is more energy to achieve ZVS over a wider load range.

Regards,