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LMR14020: Safe use of soft start pin

David Dean
Expert 2315 points
Part Number: LMR14020
Other Parts Discussed in Thread: LMR14030, LM76002-Q1, LM76003-Q1, , LM76002

I have read several posts here about the Css limitation in the WSON package.  Please tell me if this summary is correct:

1 - The issue is only present when EN is controlled externally and the part may be disabled when VIN is present.

2 - The issue is due to the inability of the WSON to completely discharge the Css capacitor, leading to a shortened soft start when the part is next enabled.

Can you give me more details about the issue when a larger capacitor is used?  My application needs a very long soft start - as long as 250ms, requiring a 1uF capacitor.  Is the issue that the capacitor will take longer to discharge?  I can keep the part disabled for a fairly long time, will the Css eventually discharge?  Or, if it will never completely discharge, will it eventually drop to some lower voltage?  I may be ok with a shorter soft start time.

There is no mention of a limitation for the HSOIC package, but can it handle a Css as large as 1uF?  Or is that too large even for this package?

Would it be safe to use an external resistor to help discharge the capacitor?  Or a FET to discharge it when the part is disabled?

On a related topic - rather than connect a capacitor to SS, I may want to drive SS externally (with an analog voltage) to control the voltage output.  If I do this I may also be able to implement the longer soft start this way, by externally applying 0V and ramping up the voltage.  Would this be a safe thing to do?  I assume that the voltage on the FB pin would track the SS pin.  Will the part indeed work like this?

  • 0
    TI__Genius 10715 points

    Hi David,

    I'm not entirely sure which posts you are referring to, if you share the links then I can comment on whether your summary is correct or not and can give more details about the issue when a larger capacitor is used.

    There is no limitation on Css for the HSOIC package. Also there is no need for an external FET to discharge the SS capacitor as there is already an internal FET responsible for discharging the capacitor.

    Lastly, I don't recommend driving SS externally as this could result in damage to the device.

    Regards,

    Harrison Overturf

  • 0 in reply to Harrison Overturf
    Expert 2315 points

    Here are some of the posts.  Some of them are from LMR14030.

    https://e2e.ti.com/support/power-management/f/196/t/554338?tisearch=e2e-sitesearch&keymatch=lmr14020%25252520Css

    https://e2e.ti.com/support/power-management/f/196/p/714373/2634126?tisearch=e2e-sitesearch&keymatch=lmr14030%2520Css#2634126

    https://e2e.ti.com/support/power-management/f/196/t/589785?tisearch=e2e-sitesearch&keymatch=lmr14030%252525252520Css

    What is the potential for damage to SS?  If I can guarantee that the voltage remains below a threshold, or is only driven through a resistor, would it be safe to do this?  

    If it's simply not recommended, are there acceptable ways to control the output voltage using the FB pin?  Or some other method?  Or, is there another part that has some sort of tracking feature that would support dynamic control of the output voltage?

    My application will have significant output capacitance, about 2200uF.  I understand that may need to be taken into account when adjusting the voltage so any advice about that would be greatly appreciated.

  • 0 in reply to David Dean
    TI__Genius 10715 points

    Hi David,

    Based on the articles you've sent, your summary is correct.

    The soft start pin on this device is meant to control the time it takes to charge the output capacitors to the desired output voltage and does not play a role in actually determining what the output voltage is. If you would like to control the output voltage with this device, you could insert a variable resistor as the lower feedback resistor but ensure that the slew rate at which you control this resistor is not faster than the crossover frequency of the device as this could result in instability. Also, the slew rate at which you change the output voltage will dictate how much current the output capacitors discharge due to ic=C(dv/dt) so this will need to be taken into account to ensure that large currents aren't produced that could harm the device itself or downstream loads.

    Having said that, there are other parts available that include a dedicated tracking pin such as:

    LM76002-Q1 and the LM76003-Q1

    These devices allow you to apply an external ramp to the SS/TRK pin in order to control the soft start time.

    Regards,

    Harrison Overturf

  • 0 in reply to Harrison Overturf
    Expert 2315 points

    Instead of using a variable resistor, would there be any concerns about applying an external voltage to the FB pin (through a resistor), either from a DAC or a filtered PWM signal?  Like this (borrowed from a different application note):

    In this case I'd hope this to be a "universal" solution that could be used with any adjustable switching regulator, not just the LMR14020.

    I would likely adjust the voltage very slowly - over at least 100mS, so I should be ok with capacitor charging or discharging current.  Where in the datasheet can I generally find the crossover frequency?  I found it in the LM76002 datasheet but not the LMR14020.

    You mentioned the current the output capacitors discharge.  Is there a concern about the capacitors discharging when the voltage is reduced?  Could that current come back through the regulator?  I was only thinking about the capacitor charging current, similar to inrush when a supply is first turned on or connected. 

  • 0 in reply to David Dean
    TI__Genius 10715 points

    Hi David,

    I think the setup you show can work as long as you do not exceed the absolute maximum voltage rating of the FB pin and as long as you carefully change the voltage at the FB pin such that the Slew rate (dv/dt) of the output voltage does not exceed the cutoff frequency, and does not cause excess output capacitor discharge currents, so yes this is a concern especially since your output capacitance is so high.

    If you demand the output voltage decrease then depending on how fast the change occurs, the output capacitors will discharge with a current equal to     ic=C(dv/dt). This current will follow the lowest impedance path to ground and if that happens to be into the regulator, then that's where it will go.

    Not all datasheets will include the crossover frequency for their device as some are externally compensated meaning that the designer has free reign to choose the crossover frequency. The quickest check would be to use CTRL-F within the datasheet to see if it is provided.

    In terms of finding crossover frequency for the LMR14020 it's not provided in the datasheet so you are going to have to run an AC analysis simulation on the part using the PSPICE models provided in the product folder. The crossover frequency will be affected by the passive components chosen, primarily the inductor and output capacitance.

    This application note gives information on determining the loop response for Peak Current Mode controllers like the LMR14020:

    https://www.ti.com/lit/an/snva793/snva793.pdf?ts=1598652105365&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FLMR14020%253FkeyMatch%253DLMR14020%2526tisearch%253DSearch-EN-everything%2526usecase%253DGPN

    Let me know if you have further questions or need more clarification.

    Regards,

    Harrison Overturf

  • 0 in reply to Harrison Overturf
    Expert 2315 points

    What sort of instability might occur?  I would not be driving the FB pin with a constant frequency, the worst case would be a step function.  Would it be similar to the overshoot or undershoot you can get from a line or load transient?  Or could there be some permanent or catastrophic instability from that single step?

    I've taken a look at the app note about loop response.  Without getting into the guts of the frequency analysis, does it seem safe to assume that Fc will be well above, say, 1KHz for all cases?  I don't need to adjust my output very quickly and I could put an RC at the output of my DAC to ensure that I keep the frequency below that level.

    My input voltage will always be higher than the output voltage, so won't that prevent the capacitor from discharging back into the regulator?  Supposing I have a Vin of 12V and an output set to 9V.  If I change the output to 6V, is there anywhere for the capacitor to flow into the regulator, given the 12V input?  

  • 0 in reply to David Dean
    TI__Genius 10715 points

    Hi David,

    I'm concerned that if you drive the FB pin with a step function that has a slew rate (by slew rate I mean (dv/dt)) which is faster than the cut off frequency of your control loop then your system output may begin oscillating and fall out of regulation.

    Your Fc should be above 1kHz for all cases, but to be sure using a simulation tool like TI PSPICE will help you confirm given your specific passive components.

    The functional block diagram on page 8 shows a path through the SW node where current could flow into the regulator. This current path could be realized during toff when the voltage across the inductor is (-Vout-Vdiode), current flowing through this path could cause damage to the internal control circuitry.

    If you have a load present however, this discharging current will flow out of the capacitor and to the load instead, so this issue is really only present at light or no load.

    Hope this helps.

    Regards,

    Harrison Overturf

  • 0 in reply to Harrison Overturf
    Expert 2315 points

    In that case, suppose this were my circuit to drive the FB pin:

    If I selected R4 and C1 to give me a cutoff frequency of 1KHz, would I be safe no matter what the actual DAC signal does?

    As for the path back into the regulator - for that node to pull current from the output capacitor it would require a negative inductor current, correct?  Does this regulator allow that to happen?  I believe that some do and some don't.  I can see how, at zero output current, current would want to flow backwards from the capacitor and into the SW node when that switch is turned on.  This would only be to refresh the BOOT capacitor, correct?  This part does not have a synchronous rectifier so I wouldn't expect it to turn on every off cycle.  Would it be possible to know the maximum on time for that switch, and then calculate the minimum output current that would prevent current from ever going back through that node?

    Do you face a similar challenge if Vin drops sharply?  If system power is shut off while the output capacitor is still charged?  If so, are there "standard" ways of dealing with that that could be applicable here?

  • 0 in reply to David Dean
    TI__Genius 10715 points

    Hi David,

    Can you please send the circuit of the FB driver again, I cannot see it, thanks.

    To your first question, yes it would require negative inductor current which is only allowed by forced pulse width modulated (FPWM) capable parts, this part is not FPWM.

    Knowing the maximum ON time for the switch in question won't help us calculate the minimum output current required, instead knowing the maximum slew rate (dv/dt) of the output capacitor will determine the minimum load current because ic=C(dv/dt) will tell us how much discharge current will be produced by the output capacitor due to a sudden change in output voltage.

    You shouldn't experience the same such problems when Vin is turned off.

    Regards,

    Harrison Overturf