LM61440: How to handle BIAS input with 24V Vin and 3V Vout.

qing Jie

Prodigy 20 points

Part Number: LM61440

Hello

My application has 24V input and 3V output with 2.4A maximum current capacity.

I plan to use LM61440 or LM61440-Q1, and will implement external sync function from a FPGA.

My question is:

Which is the proper way to handle BIAS input of LM61440?

My Vin is larger than 16V and highest power rail on board is 3V. Seems no suitable power for BIAS input.

If I could use 5K ohm & 19K ohm resistors as a voltage divider to give a 5V input to BIAS pin?

Thanks

over 5 years ago

0 Marshall_Beck over 5 years ago

TI__Mastermind 35210 points

Hello, no need to divide down. If bias is higher than absmax, can just ground Bias input. LDO would then be powered off input supply.

0 Daniel Li14 over 5 years ago

TI__Mastermind 27470 points

you may need connect Bias to GND, the divide resistor can’t provide enough current.

Thans

0 qing Jie over 5 years ago in reply to Marshall_Beck

Prodigy 20 points

Hello Marshall Beck

Tie BIAS to ground, with 24V input to LM61440 and 3V output, what is difference comparing to supply a power to internal LDO vias BIAS pin? How it impact internal control circuit and fucntion?

If tie BIAS pin to ground, does it have any limitation on output switching frequency selection?

Thanks for your help.

0 Marshall_Beck over 5 years ago in reply to qing Jie

TI__Mastermind 35210 points

Hello Qing,

Difference is you are using input voltage to power LDO versus regulated output.

There isnt any major 1st order effect.

Biggest effect if degraded efficiency (prevalent at light load), as ldo efficiency is dictated by vdrop across pass element.

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LM61440: How to handle BIAS input with 24V Vin and 3V Vout.