• State TI Thinks Resolved
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 63 subscribers
  • Views 466 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

BQ77915: Unable to turn on FETs via CHG and DSG pins

Lui Kawasumi
Prodigy 10 points
Part Number: BQ77915

Hello,

I seem to be running into some fault condition in my circuit using  BQ77915-00. I assembled three boards and have the same issue, so I think there is an issue with my design. Attached is the full schematic. I was unable to charge the battery pack, so I've disconnected the power supply, and am only connected to the three cell batteries, and I am focusing only on the BQ77915 section. The FETs are not connecting -BATT and GND, the voltage at DSG is 0, and the voltage at CHG is about 0.5V. So that seems to imply some fault condition.  

Some other observations:

-I have three li-ion batteries each right at 3.5V charge, and the voltage across -BATT and VDD is 10.5V. This leads me to believe batteries are properly connected, and i should not be tripping UV, OV, or OW faults

-Since I am not charging, nor applying any load, I don't think I should be tripping any of the over current faults. 

-I took the scope to the TS or VTB pin and did see a regular pulse, so i know the part is powered and functioning. Nothing is hot, I should not be tripping the temperature faults either. 

So what am I missing? Did I make a mistake in the schematic? 

BMS_Lui.pdf

  • 0
    TI__Guru 54715 points

    Hi Lui,

    The schematic seems ok.  As you note the device seems to be operating since VTB is pulsing.

    Faults & recovery are shown in table 5 of the BQ77915 data sheet.  To turn off both FETs is OW, OC, OTD, or UTD

    Be sure the CCFG pin is low, so that cells 4 and 5 would not be OW.

    Check that the CTRC and CTRD are really low so they could not be forcing FETs off.

    For a normal temperature the TS pin pulse should be about half the VTB pulse level.

    That leaves current faults.  LD low is required for discharge current fault recovery There are loads on the PACK- (ground symbol), check its level with respect to BAT-.  LD high recovers from OCC.  You might short across the FETs to see if that pulls LD low and recovers (OCD or SCD), or load the pack to pull LD up momentarily (OCC recovery).