• State TI Thinks Resolved
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 63 subscribers
  • Views 380 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

CSD95377Q4M: CSD95377Q4M Absoulte maximum check

Tony Lu
Prodigy 30 points
Part Number: CSD95377Q4M

Dear Sir,

About Absolute maximum ratings of Vsw to PGND(10ns).

Does it mean CSD95377Q4M can allow negative voltage over -0.3 under -7V in 10ns and positive over 20V under 23V in 10ns?

Since I measure the Vsw to PGND waveform, the negitive voltage, over -0.3 under -7V time over 10ns(below the waveform for your reference).

Is it possible device get damage?

Best Regards,

Tony

  • 0
    TI__Expert 3525 points

    Hi Tony,

    For the negative spike, it is also possible to be caused by measurement loop which included parasitic inductance. From the waveform it seems OK.

    For the positive spike on VSW, we usually suggest to design with 10% margin, which means we want to control the ringing peak to be less than 18V under the worst condition. To effectively limit the ringing, we suggest to place VIN bypass caps as close as possible to power stage, and you can tune the BOOTR, snubber_R and Snubber_C to minimize the voltage stress to FETs.

    Best,

    Qingquan