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CSD22205L: ThetaJB Parameter

Don Schelle
Expert 4150 points
Part Number: CSD22205L
Other Parts Discussed in Thread: TPS62861,

Hello,

Do we spec a ThetaJB (junction-to-board) parameter for this device?

I know my maximum PCB temperature, but not the maximum ambient.    My application requires a ThetaJB of less than 60 oC/W.

Don

  • 0
    TI__Mastermind 33475 points

    Hi Don,

    Great to hear from you. I'm checking with a colleague on this one since we do not spec RthetaJC (or JB) for these small packages. I believe they're too small to thermocouple to make temperature measurements. I'll update you as soon as I have more information.

  • 0 in reply to John Wallace1
    TI__Mastermind 33475 points

    Hi Don,

    After consulting with a colleague, the concept of junction-to-case or bottom doesn't make much sense because these are silicon level devices with no case. It's a basically a silicon chip with LGA interconnects. The case is the junction. The only parameter we can spec is junction-to-ambient which is the same as board-to-ambient and will depend on the PCB layout and stackup.Hope this helps.

  • 0 in reply to John Wallace1
    TI__Expert 4150 points

    Thanks John,

    So that I understand, for LGA packages, is it safe to assume that the ThetaJC and JB parameters are in the single-digit oC/W range?  (i.e. less than 10 oC/W).   This of course assumes the package is connected to 1 sq-inch of 2 oz copper (which is fairly standard for spec'ing these devices, and used for the ThetaJA parameter).

    Don

  • 0 in reply to Don Schelle
    TI__Mastermind 33475 points

    Hi Don,

    I did a search for similar packaged TI products. The TPS62861 is in a 0.7x1.4mm DSBGA and specs RthetaJB = 33.7degC/W. The LMV981 is in a 1x1.5mm DSBGA and specs RthetaJB = 23.4degC/W. Those are the closest comparisons I could find. I think the CSD22205L will be a bit lower because it's larger and uses big lands instead of balls for interconnect to the PCB. I could submit a request to the packaging team to model this but would need details on the PCB layout and stackup. In my experience, it typically takes 1 to 2 weeks to complete the modeling and provide the thermal parameters.

  • 0 in reply to John Wallace1
    TI__Expert 4150 points

    Thanks John,

    The CSD22205L is on our short list.   Would you please submit a request to generate these package metrics?    Let's use 1 sq-inch of 2 ounce copper as the PCB layout metrics, as this will let us compare apples-to-apples against other FET's.  

    Don

  • 0 in reply to Don Schelle
    TI__Mastermind 33475 points

    Hi Don,

    I'll get the process started for the thermal modeling. I am going to close out this thread and we can handle this via regular email.