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TPS784: Achievable LDO output accuracy

Part Number: TPS784

TPS784's datasheet shows a good accuracy number of 0.5% on page 6, and 1.5% on page 21. I noticed that CircuitEXP lately demonstated that TPS784 can only achieve a 5% output accuracy per their online tutorial.

It seems that, to achieve 3% accuracy, the resistance needs to be much lower for TPS784 due to the bias current variation. Could you please confirm the analysis result shown in table 8-1 in the datasheet?

  • Hi Derek,

    I've never seen this online tool before, but I've been calculating the statistics for output voltages for years similar to how they are doing it.  I have developed a tool based in MS Excel using VBA to automate this, similar to the online tool, but we have many more features to play with than what you see with the CircuitEXP tool.

    Having said that, first you can absolutely achieve better than 5% accuracy with an adjustable setpoint design using the TPS784.  The feedback voltage across temperature gives 1.5% tolerance, so in a best case scenario with zero tolerance associated with the feedback resistors, the output voltage will be 1.5%.  Additionally the reference voltage is a 6 sigma tolerance as shown in figure 5 in the Application Report by TI, "AN-1378 Method for Calculating Output Voltage Tolerances in Adjustable Regulators".  In our analysis we can assume a worst case of 3 sigma tolerance for that and the other parameters.  Using my tool I can simulate all possible resistor combinations and give you plenty of design options with better than 5% tolerance.  See below.  This data assumes 3-sigma for tolerances (so a 1% resistor is 1% tolerance and 1 standard deviation, or 1 sigma, is 0.33%).

    The key to all this is understanding Gaussian statistics and what sigma level you are designing to.  It looks like the CircuitEXP tool is assuming a 6-sigma design criteria, which is 3.4 ppm failures.  For many designs and at many companies, you do not need anywhere near this much margin, and it is more common to use a 3-sigma design.  Look at the standard deviation instead, and calculate the tolerance to your design based on your companies sigma score requirements.

    R1 R2 Vout Average Vout Standard Deviation
    2550 1470 3.281595945 0.019136081
    1070 619 3.274297953 0.019166077
    17400 10000 3.287750244 0.019169083
    10200 5900 3.274428844 0.01917403
    11800 6810 3.279124975 0.019183679
    619 357 3.28066349 0.019187609
    52300 30100 3.284297466 0.019190166
    750 432 3.283322573 0.019190798
    28000 16200 3.273669243 0.019195009
    2800 1620 3.274033785 0.019195119

    I ran the simulation for Table 8-1. The temperature maximum is 85C, so we can lower the tolerance on Vref to be +/- 0.75%.  Even still, these values of setpoint resistors will not provide a 1.5% tolerance setpoint, even when using the 3-sigma design criteria.  I would use the table I provided for some options for a 3.3V adjustable output, or you can reply back and let me know what setpoint you are looking at.  My tool can also accept different tolerances for the resistors, and I can provide a histogram of the results if you need.

    Thanks,

    - Stephen

  • Stephen,
     
    Thanks of shedding light on this question.
     
    I tried a few numbers using CircuitEXP, and believe that they are using traditional worst-case analysis, which is actually used commonly in circuit design society. Min/Max does not necessarily agree with 3 sigma or 6 sigma, especially when the distribution curve is unknown or unpublished.
     
    The app-note you mentioned is good one, which provides the insight on how to look at the statics of the regulator output voltage accuracy. If the variation of resistors does follow bell curve centering at the nominal resistance every reel from different vendors, the statics method is trustworthy. Is this the method the datasheet use to get the 1.5% output tolerance value for TPS784? Could TI confirm on this?
     
    One thing I am puzzled is the bias current into the ADJ pin. Most time, we see the typical value with non-symmetrical min/max. How do we deal with this type in a statistical way? Nowadays, the resistor value used gets higher and higher to minimize the current consumption, and it may become a important factor for the error to check. 
     
    For TPS784, the Iadj is given as (-100nA min, 10nA typ, +50nA max). 500KOHm to 1MOHm could cause significant error. Using CircuitEXP, it says the resistors (550KOhm, 976KOHm) themselves already introduce more than 2% worst-case error.
     
    In your tool, how do you deal with Iadj? How about TI?
     
    Looking at your result, I have a question. Taking (10200, 5900, 3.274428844, 0.01917403) as an example, if 3 sigma is the criteria, [(3.274-0.0192*3)V-3.3V]/3.3V = -2.5%. If 6 sigma is the limit, [(3.274-0.0192*6)V-3.3V]/3.3V = -4.3%. I probably have misunderstood your data. Could you help me on this?
     
    Also, what is your reasoning to lower the tolerance on Vref from +/- 1.5% to +/- 0.75%?
     
     
    Derek
  • Hi Derek,

    It is true that worst case analysis is performed in industry, but the question comes up "what defines worst case"?  Worst case analysis is different than 6 sigma or 3 sigma statistical analysis.  I have used 6 sigma statistics to review the CircuitEXP answers and I can achieve similar results.  So if you assume each parameter is Guassian, and you assigned 6 standard deviations to each tolerance, then you do the math, you will get similar results as CircuitEXP.  Again, we have additional knobs to use in our tool which makes our simulation results more accurate than CircuitEXP.  I plan on writing a white paper in the near future which builds on the paper I link in the previous response, and I hope to release the tool so that others can use it as well.  You can safely assume that all parameters are guassian (Vref, resistors and bias current).  Vout tolerance is guassian (I have used Crystal Ball to confirm using simulation data in the past).

    The datasheet table should not be listing the design example as 1.5% tolerance, after rerunning the simulation for that example I can confirm that it will not meet the 1.5% tolerance from either a 3 sigma perspective or 6 sigma perspective.  I would use the values in my reply to obtain lower tolerance setpoint resistors for this setpoint.

    Your interpretation of the data is correct.  3 sigma gives -2.5% and 6 sigma gives -4.3%.  There is also the positive tolerance to review.  3.274+0.0192*3, which when calculated gives 0.958% (so -2.5% / + 0.958%).  For a 6 sigma design, 3.274+0.0192*6, which when calculated gives +2.7% (so -4.3% / +2.7%).  When you look at this long enough, you'll realize that these tools are trying to shift the sensitivity to the reference voltage tolerance while also moving the average closer and closer to the desired Vout. 

    The reasoning on lowering the Vref from +/- 1.5% to +/- 0.75% comes from the electrical characteristics table.  The design example stated that the temperature was 85C max.  At a reduced temperature range the fluctuation on Vref is lower and the tolerance is improved.

    Bias current is always a difficult parameter to work with in my experience.  There are several challenges here.  The measurement of such low current values is very difficult, in modern LDO's it is often 10 nA or possibly even less.  Taking this measurement to confirm the device is meeting the datasheet spec can be difficult in the presence of noise at these levels.  The datasheet will increase the limits to ensure that we have margin for our own manufacturing processes.  For a specification like the TPS784, where you have a typical of 10nA but limits of -100nA and 50nA, the worst case scenario is the take the average (-25nA) and use a tolerance of 75nA.  If you want to be conservative you assign 3 sigma to that 75nA tolerance.  Or you can assign a more realistic 6 sigma, which is what I believe the CircuitEXP tool might be doing.  My tool can assign different distributions to each parameter, however on review they are well modeled as Guassian so that is how I usually run the analysis.

    Thanks,

    - Stephen

  • Stephen,

     

    Thanks for going through the details with me.

    So far, we seem to conclude,

    1. The 1.5% accuracy number shown as a design example in TPS784 datasheet is not achievable. Not sure how it is calculated though.


    2. Without considering the bias current into the feedback pin, your tool gets us 3 sigma accuracy of about 2%, and 6 sigma accuracy of 3-4%. Bringing the bias current into consideration, CircuitEXP comes up with worst-case (or 6 sigma?) accuracy of 5%, which is much higher than the datasheet claims.

     

    I have a last question on Vref tolerance. You showed me where the 0.5%, 0.75% and 1% tolerance for Vout are coming from. However, if you use the Vfb min/max values, (1.182V min, 1.2V typ, 1.218V max), from the datasheet, you may see 1.5% error for Vfb. Doesn't this contradict with Vout accuracy of 0.5%, 0.75%, or 1%? What is the explanation?

     

    Regards

     

    Derek

  • Hi Derek,

    No problem, we are here to help.  Just so we are clear, my tool uses the bias current.  The answers I have provided include the bias current.  So including tolerances on Vref, the feedback resistors, and the bias current, you can achieve a 3 sigma accuracy of 2%, and a 6 sigma accuracy of 3-4%. 

    I think I can resolve the issue in the application section of the datasheet.  It appears the example does not include the bias current.  If I remove that (I set it to 1pA with 1pA of tolerance) then the simulation gets us very close to 1.5% tolerance, using Vref = 0.75% tolerance.  So that is the issue there.

    The Vout accuracy of 0.5%, 0.75% and 1% does not include the feedback resistor tolerances.  See note (1) under the table. Across the entire temperature range, the Vout tolerance would be +/- 1.75% (the 0.75% is from -40C to 85C and the 1% is from 85C to 150C).   Also, I need to correct a typo from a previous reply.  I wrote that Vout would be 1.5% tolerance without feedback resistor tolerances, what I meant to write was 1.75% tolerance across temperature.  The Vout accuracy includes Vref tolerance, Line Regulation and Load Regulation which is why it is slightly higher than just the Vref tolerance alone.  In sum, Vout accuracy includes all DC components except for the tolerances due to the setpoint resistors.  So there is no contradiction.

    Thanks,

    Stephen

  • Hi Derek,

    I took another look at the CircuitEXP tool.  I get identical answers if I use the same settings as that tool in my MS Excel based tool.  So I think that might help you have confidence in the data I have provided.

    Thanks,

    - Stephen