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LMG1210: Using half-bridge driver in push-pull (common Gan FET grounds) configuration

Patrick Vilbrandt
Prodigy 20 points
Part Number: LMG1210
Other Parts Discussed in Thread: LMG1020

I am intending to use the LMG1210 to drive a dual GaN FET PA in a push-pull configuration.  The data sheet doesn't mention using the part in this manner and I wonder if there are any gotcha's with doing this.  In particular, what to do with the BST pin?

  • 0
    TI__Genius 13445 points

    Hello Patrick,

    Thanks for reaching out.

    It looks like the image did not get attached. If available, can you please share a tentative schematic and/or block diagram.

    I assume you're intending to use the high-side and low-channels to drive the complementary gates of the GaN FETs in which case there are few things to take into consideration:

    1. The high-side channel HO is referenced to HS pin but since you're not using the IC in a bridge topology, you may tie HS to GND (Source of the GaN FETs)

    2. HB-HS cap typically provides bias for the high-side channel in a bootstrap configuration but since your FETs are GND referenced, you may tie BST to HB which will allow Vin to provide bias through internal FET.

    3. Ensure all signals are within the recommended operating conditions of the ICs.

    You might also consider 2 IC solution using LMG1020.

    Regards,

    -Mamadou

     

  • 0 in reply to Mamadou Diallo
    Prodigy 20 points

    Sorry the schematic image didn't come through.  I have attached a PDF of the example circuit.

    The important feature of the LMG1210 is the ability to adjust the dead time so that I can achieve the required 37% duty cycle to drive the each of the 2 out of phase Class EF2 PAs in push-pull configuration.

    Thanks.

    4606.Sheet1.pdf

  • 0 in reply to Patrick Vilbrandt
    TI__Genius 13445 points

    Thanks for the details.

    The dead-time feature will certainly be handy from the looks of you have the maximum dead-time set.

    No need to connect to VDD to VIN externally as it is automatically connected through an internal LDO, keep in mind VDD is rated at 5V while VIN is rated for 18V. Kindly review the recommended operating conditions table in section 6.3.

    Connect BST to HB externally and ensure that you have 2 ESR decoupling capacitors (>=1uF AND 0.1uF) on HB-HS(GND) very close to the pins in addition to VIN_GND caps. 

    You might add a small placeholder capacitor (<200pF) on PWM pin for filtering.

    Regards,

    -Mamadou