Hello team,
Customer will not use the functions of UVLO and OVP.
Could you advise how customer should treat the pins ?
Thank you and best regards,
Michiaki
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Hello team,
Customer will not use the functions of UVLO and OVP.
Could you advise how customer should treat the pins ?
Thank you and best regards,
Michiaki
Hello Rakesh,
Please let me double check on treating unused pin for UVLO.
Could TPS2663 boot up even if UVLO ties to GND ?
I
Thank you and best regards,
Michiaki
Yes, the device powers up for Vin between 15.46V and 34.33V
Best Regards, Rakesh
Hello team,
Customer would like to know the mechanism why OVP and UVLO will be disable when both UVLO pin and OVP pin is tied to GND.
In their understanding, the switch A and B would be tied to bottom side (drawing red line) by driving high from UVLO and OVP comparator 1 and then OVP and UVLO function would be disable by low output from UVLO and OVP comparator 2.
Is their understanding correct ?
Thank you and best regards,
Michiaki
Hi Michiaki,
Connecting UVLO and OVP pins to GND does NOT disable UVLO and OVP features but gets set to factory programmed values of 15.46V for UVLO and 34.33V for OVP.
The switch A and B would be tied to top side (drawing black line) by driving high from UVLO and OVP comparator 1 and then OVP and UVLO references are taken from the internal resistive ladder at IN_SYS.
It would be good if you arrange an EVM to the customer for evaluation.
Best Regards, Rakesh
Hello Rakesh,
Customer will not use the function of UVLO and OVP and ask how to treat with UVLO pin and OVP pin.
Could you kindly advice how to disable UVLO and OVP function ?
Thank you and best regards,
Michiaki
Hello Rakesh,
In case your block diagram, you mean that UVLO and OVP to raising threshold will be 1.2V as below block diagram in the datasheet ?
It means that UVLO function won’t be completely disable and input voltage needs min 1.2V at least.
Is my understanding correct ?
Thank you and best regards,
Michiaki
Hi Rakesh,
Customer wants Input Reverse Polarity Protection.
In case of UVLO disable and the above, customer should place current limit resistor between IN_SYS and UVLO ?
Thank you and best regards,
Michiaki
Hi Michiaki,
Device needs min 4.5V to work properly. else POR block keeps device in OFF state.
Best Regards, Rakesh
Hi Michiaki,
In the applications where reverse polarity protection is required connect a minimum of 300-kΩ resistor between UVLO and IN_SYS.
Best Regards, Rakesh
Hello Rakesh,
Our customer would like to disable UVLO and OVP function but they would like to enable input reverse polarity protection.
And based on your answer, they will fix their schematic as following.
Please review the above circuit and point out if there are any concerns.
Thank you and best regards,
Michiaki