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TPS566235: Input Capacitor Value, WEBENCH and Datasheet Formula

Ue
Genius 17165 points
Part Number: TPS566235

Hi all

Please find a question from my customer below regarding input capacitor value.

Please comment / clarify.

Thank you and best regards

Ueli

-------------------------------------------------------------

Last time you recommended this part TPS566235RJNT for my design requirements Vin=6.9V, Vout=3.3V and Iout max = 5A.

I was using TI WEBENCH and it generated a circuit for me (see below):

So the circuit has chosen Cin=47uF (C3216X5R1E476M160AC from TDK) and I tried to work out the value of Cin using the datasheet of TPS566235RJNT with the following formula:

I first worked out the input ripple current using Equation 6: Icin(rms) = 2.49A

Then worked out Vinripple = 2.49 x 2mohm (ESR) = 0.00499V

Then substituted Vinripple and Fsw=600KHz in Equation 5, and worked out Cin(min) = 797uF

I know my calculation was wrong because 797uF seems way too large! Are you able to shed some light please?

 Thanks for your support!

 

  • 0
    TI__Mastermind 18510 points

    Hi,

    Correct your error that the input ripple should not calculated with ESR only first, you can assume that Vin ripple 100mv or 200mv or others can be acceptable, based on this value to evaluate the caps value with formula 5, but as experience, even so, the calculation data is usually bigger than needed,

    For your application case, based on my experience, (2~3)*22uf 16V X5R 0805 should be ok.

    Yuchang

  • 0 in reply to Yuchang Zhang
    TI__Genius 17165 points

    Yuchang

    Thank you for the quick reply. Can you provide also the calculation you use to determine the required input capacitor value ?

    Please illustrate this with an example using the formula provided in the Datasheet.

    ... and how to come to the estimated 3 x 22uF ?

    I like to see a more analytical approach here.

    I also assume that one point to consider is to make sure the input voltage never trips the UVLO / drops below the UVLO threshold.

    Best regards

    Ueli

  • 0 in reply to Ue
    TI__Mastermind 18510 points

    Ue,

    Assume the ripple 200mv is acceptable in your system, based on formula 5 and your application Vin6.9V/Vout3.3V, the input caps value is calculated about 23uf, and considering the Bias voltage 2*22uf should be OK. and actually we did some test, this value support 7Vin well. except the input source fluctuate a lot.

    For your UVLO concern, since the UVLO is 3.7V, big gap here, several hundreds ripple will not cause it triggered.

    Yuchang

  • 0 in reply to Yuchang Zhang
    TI__Genius 17165 points

    Yuchang

    Understood and thank you for the clarification. 

    And yes, given Vin=6.9V there is no risk running into UVLO. This would be different for a Vin=5V supply.

    Best regards

    Ueli