Other Parts Discussed in Thread: UCC21750
Hello,
The problem we are facing is that we cannot see the soft turn-off from the output pin after the Desat protection is triggered. The output of the chip turns to VEE2 only within around 50 ns after the desat is triggered.
The following figure is the schematic we use for this chip. We suspect whether it is because we short OUTL and OUTH before the turn-on and turn-off resistor?
Also, according to figures 15-18 of the datasheet of ISO5852SQDWRQ1, the soft turn-off waveform is generated with the existence of CL. But the datasheet doesn't specify where the CL locates in the application circuit. So I am wondering where we should place the CL and whether it is necessary for the soft turn-off of the gate drive chip?
Thank you in advance for helping out and best regards,
Jerry