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BQ76PL455A-Q1: Internal working of IC

Aditya Sharma2
Prodigy 20 points
Part Number: BQ76PL455A-Q1
Other Parts Discussed in Thread: BQ76PL455A,

  • What is the minimum voltage difference required between the two individual cells for balancing to get started?
  • Can you please explain the mechanism of the generation of equalizing (EQ) voltage signal for turning on balancing FETs?
  • Is Simulation of bq76pl455a performed on Matlab/Simulink? If not can you please specify the software?

  • 0
    TI__Genius 17440 points

    Hi Aditya,

    The CBENBL register controls when balancing starts. The BQ76PL455A doesn't have any specific requirements for cell imbalance to determine when to start cell balancing; this is completely controlled by the host MCU (and therefore customer preference). 

    Unfortunately I can't go into detail about information not included in the datasheet on E2E. Is there a reason why you need this information? Perhaps I can point you to publicly available information that would help.

    Best Regards,

  • 0 in reply to Kristin Jones93
    Prodigy 20 points
    • Actually, I wanted to confirm from where do IC generates the voltages for turning on balancing FETs, does it do by asserting to Vsense(N) rail?
    • Actually, I searched the whole datasheet and could not found where is the register for specifying when to start the balancing, could you please help me out. 

     

  • 0 in reply to Aditya Sharma2
    TI__Genius 9401 points

    Hi Aditya,

    See my response below.

    • Actually, I wanted to confirm from where do IC generates the voltages for turning on balancing FETs, does it do by asserting to Vsense(N) rail?
    • Yes. This information can be found in section 7.3.7 "Passive Balancing" in the device datasheet: "When the device issues a balance command through register CBENBL, the bq76PL455A-Q1 asserts the EQ(N) output, switches to the VSENSE(N) rail and turns on QBAL. With a de-asserted register bit, the EQn bit switches to the VSENSEn–1 rail, turns off QBAL"
    • Actually, I searched the whole datasheet and could not found where is the register for specifying when to start the balancing, could you please help me out.
      • See section 7.6.3.14 "CBENBL 0x14–15 (20–21) Balancing Enable" in the datasheet. CBENBL register is used to enable/disable balancing for each channel. 

    Best regards, 

    Leslie