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LP3918: What happens when CV charge timeout occurs?

Part Number: LP3918

The datasheet is ambiguous on what exactly happens after CV charge timeout other than "Tout_ConstV Set after timeout in CV phase".

  1. I would assume the CV charge phase is stopped.  Is this correct?
  2. Is charging disabled?
  3. Does MCU need to take action to restart charging?

  • Hi,

    Thank you for reaching out on the E2E forums. First I would like to point out this device is NRND, so if you are evaluating this for a new design I encourage you to also consider TI's newer battery management ICs. Regarding your questions:

    1. You are correct, if a CV charge timeout occurs the Tout_ConstV bit will be set and the device should shut down to protect itself.
    2. Yes, after timeout charging is disabled.
    3. The battery or charge must be removed/disconnected and re-applied to restart normal operation. Assuming the MCU is powered by the LP3918, it will not be powered after a charger timeout, so it won't be able to take any action. 

    Thanks,

    Gerard

  • The MCU is powered by LP3918-LDO2 which is powered by battery.

    What seems to be happening is the charging cycle stops, I suspect CV charge timeout.

    The battery voltage continues to drop.

    When MCU is issued a reset command, charging resumes.  I'm assuming the MCU reset reinitializes the LP3918.EN_CHG=1 which causes charge cycle to restart.

    You seem to be indicating battery removal is required to recover from timeout.  Are you sure battery removal isn't only required from BAD_BATT status?

    Thanks for pointing out NRND.  This part is being used in a legacy device and I'm trying to get the person who has engineering authority to understand how the device works so they can properly manage it with firmware.

  • Hi,

    If you would like to confirm a timeout has occurred, you can check the CHGSTATUS1 and CHGSTATUS2 registers.

    You're understanding is correct - I've found that the charger is turned off after any timeout, but this does not mean the device as a whole is turned off. The shutdown occurs during a BAD_BATT fault as you suspect. My apologies, I misunderstood our description of the timeout features. I do appreciate your diligence in checking the behavior with hardware on your side. I can do my best to support your questions, but since you have a functioning system, the best approach is to validate directly as you have done.

    To provide some background, this is a legacy National Semiconductor device. We do not have an EVM, so I cannot help check the device behavior on my end. Similarly, we also have little documentation on this device, and the original development team is not with TI, resulting in very limited resources for support. These factors contributed to the decision to NRND this part, meaning we can continue to provide the device for existing, proven systems, but we do not have the tools to provide TI's standard level of support for new developments. 

    Thanks,

    Gerard

  • Thanks for confirming and additional background info,  That's what I figured.