Hi support team
What happened while DT PIN tied to 1/2 VCCI
it's deadtime control or overlap behavior?
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Hi Red,
To control the dead time, put a 500-Ω to 500-kΩ resistor (RDT) between DT and GND to adjust dead time according to: DT (in ns) = 10 x RDT (in kΩ). It is recommended to parallel a ceramic capacitor, 2.2 nF or above, close to the DT pin with RDT to achieve better noise immunity.
DT tied to VCC will allow the outputs to overlap.
We don't recommend operating or configuring this pin outside of these conditions.
Regards,
Krystian Plaskota