Assume for the sake of argument that !LPM is pulled low during the startup procedure as describe in §8.3.4 of the data sheet. How would it affect the timing diagram in Fig. 16?
I'm assuming, for starters, that !FAULT never clears. But before that:
- Does VDD pass VDD_ON? (assuming yes)
- Is LDO 5V built up (???)
- Is VNEG built up (assuming no)
Furthermore (not in the diagram):
- When does RDRV build to 1.25V (as specified in another question in this forum)?
I'm assuming the latter is no since it requires VNEG? i.e. would start building after VNEG but before !FAULT high?
Thanks